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NetApp’s FlexGroup Volumes – A Game Changer for EDA Workflows

NetApp’s FlexGroup Volumes – A Game Changer for EDA Workflows
by Mike Gianfagna on 12-23-2020 at 10:00 am

NetApps FlexGroup Volumes – A Game Changer for EDA Workflows

In my prior post on NetApp, I discussed how the company’s FlexCache technology can keep distributed design teams in sync. Coordination and collaboration are critical elements of any complex design project. The ability to deliver results quickly while managing the massive amounts of data is also a critical element of success.… Read More


Automatic Generation of SoC Verification Testbench and Tests

Automatic Generation of SoC Verification Testbench and Tests
by Daniel Nenni on 12-23-2020 at 6:00 am

Agnisys QEMU

Last month, I blogged about a webinar on embedded systems development presented by Agnisys CEO and founder Anupam Bakshi. I liked the way that he linked their various tools into a common flow that spans hardware, software, design, verification, validation, and documentation. Initially I was rather focused on the design aspects… Read More


A Research Update on Carbon Nanotube Fabrication

A Research Update on Carbon Nanotube Fabrication
by Tom Dillinger on 12-22-2020 at 10:00 am

IV measurement testchip

It is quite amazing that silicon-based devices have been the foundation of our industry for over 60 years, as it was clear that the initial germanium-based devices would be difficult to integrate at a larger scale.  (GaAs devices have also developed a unique microelectronics market segment.)  More recently, it is also rather … Read More


The Heart of Trust in the Cloud. Hardware Security IP

The Heart of Trust in the Cloud. Hardware Security IP
by Bernard Murphy on 12-22-2020 at 6:00 am

The Heart of Trust in the Cloud

You might think that cloud services run on never-ending racks of servers and switches in giant datacenters. But what they really run on is trust. Trust that your data (or your client’s data) is absolutely tamper-proof inside that datacenter. Significantly more secure than it would be if you tried to manage the same operations in… Read More


Flex Logix Expands Its eFPGA Footprint with a Low Power Comms Design Win from OpenFive

Flex Logix Expands Its eFPGA Footprint with a Low Power Comms Design Win from OpenFive
by Mike Gianfagna on 12-21-2020 at 10:00 am

Flex Logix Expands Its eFPGA Footprint with a Low Power Comms Design Win from OpenFive

Embedded FPGA use is on the rise. The programmability offered by this kind of IP finds many applications in complex SoCs. There was a recent announcement that OpenFive had licensed Flex Logix’s eFPGA to develop a low power communications SoC. The part required a large eFPGA. The news was reported on SemiWiki here. This announcement… Read More


Does IDE Stand for Integrated Design Environment?

Does IDE Stand for Integrated Design Environment?
by Daniel Nenni on 12-21-2020 at 6:00 am

SemiWiki2 design 1

As regular readers may know, every few months I check in with Cristian Amitroaie, CEO of AMIQ EDA, to see what’s new with the company and their products. In our posts so far this year we’ve focused on verification, and now I’m wondering how an integrated development environment (IDE) provides benefits to designers. They work on huge… Read More


3DIC Design, Implementation, and (especially) Test

3DIC Design, Implementation, and (especially) Test
by Tom Dillinger on 12-20-2020 at 8:00 am

IO cell

The introduction of direct die-to-die bonding technology into high volume production has the potential to substantially affect the evolution of the microelectronics industry.  The concerns relative to the “end of Moore’s Law”, the diminishing returns of continued (monolithic) CMOS process scaling, and the disruptive effect… Read More


SMIC Blacklist puts ASML in Jam

SMIC Blacklist puts ASML in Jam
by Robert Maire on 12-20-2020 at 6:00 am

SMIC Blacklisted US

US BIS confirms our prediction of “blacklisting” SMIC
SMIC embargoed from 10NM or better technology
Likely related to ASML pressure & WH scorched earth

Not just the stock

We had received a lot of feedback on our Nov 30th note regarding blacklisting of SMIC suggesting that we were wrong and the only thing blacklisted… Read More


Webinar: Increase Layout Team Productivity with SkillCAD

Webinar: Increase Layout Team Productivity with SkillCAD
by Daniel Nenni on 12-18-2020 at 10:00 am

Header Webinar 1

The Cadence Virtuoso Design System has been one of the premier Integrated Circuit design systems for many years and is used by most major semiconductor companies.  While it is powerful and versatile, it is often not optimized for certain complex, repetitive and time-consuming layout design tasks.

The founder and president … Read More


Silicon Catalyst’s Semi Industry Forum – All-Star Cast Didn’t Disappoint

Silicon Catalyst’s Semi Industry Forum – All-Star Cast Didn’t Disappoint
by Mike Gianfagna on 12-18-2020 at 10:00 am

Silicon Catalysts Semi Industry Forum – All Star Cast Didnt Disappoint

A few weeks ago I wrote about an upcoming event Silicon Catalyst was hosting, the Semiconductor Industry Forum – A View to the Future. I mentioned a high-profile group of presenters: Don Clark, Contributing Journalist, New York Times as moderator;  Mark Edelstone, Chairman of Global Semiconductor Investment Banking, Morgan… Read More