A Six-Minute Journey to Secure Chip Design with CaspiaHardware-level chip security has become an important topic…Read More
Lessons from the DeepChip Wars: What a Decade-old Debate Teaches Us About Tech EvolutionThe competitive landscape of hardware-assisted verification (HAV) has…Read More
Think Quantum Computing is Hype? Mastercard Begs to DisagreeJust got an opportunity to write a blog…Read More
TSMC Kumamoto: Pioneering Japan's Semiconductor RevivalIn the lush landscapes of Kumamoto Prefecture, on…Read More
The semiconductor market in 2022 is weakening. Driving factors include rising inflation, the Russian war on Ukraine, COVID-19 related shutdowns in China, and lingering supply chain issues. Four of the top 14 semiconductor companies (Intel, Qualcomm, Nvidia and Texas Instruments) are expecting lower revenues in 2Q 2022 versus… Read More
Dan is joined by Maheen Hamid, Chief Operating Officer and Chief Financial Officer at Breker Verification Systems and a recipient of Silicon Valley Business Journal’s 100 most influential women award. Maheen discusses her journey to Silicon Valley and Breker, beginning with her upbringing in Bangladesh. Maheen married… Read More
…and support the creation of successful Chiplet business
The One-Stop-Shop model has allowed IP vendors of the 2000’s to create a successful IP business, mostly driven by consumer application, smartphone or Set-Top-Box. The industry has dramatically changed, and in 2020 is now driven by data-centric application (datacenter,… Read More
The TSMC Technical Symposium is today so I wanted to give you a brief summary of what was presented. Tom Dillinger will do a more technical review as he has done in the past. I don’t want to steal his thunder but here is what I think are the key takeaways. First a brief history lesson.
The history of TSMC Technology Development with 12 key… Read More
Dan is joined by GD Bansal, COO at Axiomise. Dan explores the Axiomise business model to provide training and consulting services for formal verification with GD. The benefits and challenges of using formal verification on complex designs are discussed, along with the benefits of the Axiomize vendor-neutral approach to … Read More
I wrote recently about Siemens EDA’s philosophy on designing quality in from the outset, rather than trying to verify it in. The first step is moving up the level of abstraction for design. They mentioned the advantages of HLS in this respect and I refined that to “for DSP-centric applications”. A Stanford group recently presented… Read More
Electronics noise is often described as “white,” spread evenly across a band, typical on older semiconductor processes where thermal and shot noise dominate. As transistors shrink, “pink” 1/f noise takes over at low frequencies – becoming stronger in advanced processes and quantum computing technology. But it’s not an easy… Read More
What’s at stake? A candid discussion between Junko Yoshida, Editor in Chief of the Ojo-Yoshida Report, and Frank Lin, CEO of Andes.
Will Arm RISC-V? from the Ojo-Yoshida Report
Andes Technology, a Taiwanese CPU core IP company, began phasing out its proprietary processing architecture in favor of RISC-V in 2015, as it prepared… Read More
Driven by the need to rapidly move data across a chip, the NoC IP is already a very common structure for moving data with an SoC. And various implementations of the NoC IP are available in the market depending on the end system requirements. Over the last few years, the RISC-V architecture and the TileLink interface specification … Read More
For the past few decades, System-on-Chip (SoC) has been the gold standard for optimizing the performance and cost of electronic systems. Pulling together practically all of a smartphone’s digital and analog capabilities into a monolithic chip, the mobile application processor serves as a near-perfect example of an SoC. But… Read More
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AI RTL Generation versus AI RTL Verification