Why does it seem like current FPGA devices work very much like the original telephone systems with exchanges where workers connected calls using cords and plugs? Achronix thinks it is now time to jettison Switch Blocks and adopt a new approach. Their motivation is to improve the suitability of FPGAs to machine learning applications,… Read More


Mentor Excitement at 56thDAC!
Mentor continues to invest in conferences such as DAC, no matter the location, for which I am very grateful. They have a long list of activities this year but I wanted to point out my top three:
Wally Rhines has a talk in the DAC Pavilion which is first on the list. Wally’s expert industry perspective is the result of tireless research… Read More
Mentor Extends AI Footprint
Mentor are stepping up their game in AI/ML. They already had a well-established start through the Solido acquisition in Variation Designer and the ML Characterization Suite, and through Tessent Yield Insight. They have also made progress in prior releases towards supporting design for ML accelerators using Catapult HLS. Now… Read More
Webinar Recap: IP Life Cycle Management and Traceability
Earlier this month I attended a webinar organized by Methodics on the topic of IP life cycle management and traceability, with three presenters and a Q&A session at the end. I’ve worked with Michael Munsey before and he was the first presenter. Semiconductor IP creation and re-use is the foundation of all modern IC designs,… Read More
What are SOTIF and Fail-Operational and Does This Affect You?
Standards committees, the military and governmental organizations are drawn to acronyms as moths are drawn to a flame, though few of them seem overly concerned with the elegance or memorability of these handles. One such example is SOTIF – Safety of the Intended Function – more formally known as ISO/PAS 21448. This is a follow-on… Read More
20 Questions with John East
Breker on PSS and UVM
When PSS comes up, a lot of mainstream verification engineers are apt to get nervous. They worry that just as they’re starting to get the hang of UVM, the ivory tower types are changing the rules of dynamic verification again and that they’ll have to reboot all that hard-won UVM learning to a new language. The PSS community and tool … Read More
Uber Lyft and the Price of Greed
Uber and Lyft blew it with their initial public offerings over the past couple weeks. Both companies opted to cash out founders and early investors while tossing pennies to long-supportive drivers in the form of bonuses. The short-term cash out focus could sound the death knell of these market leaders.
Both companies extracted… Read More
Learning on the Edge Investment Thesis
It is said that it will cost as much as $600M to develop a 5nm chip. At that price, only a few companies can afford to play, and with that amount of cash in, innovation is severely limited.
At the same time, there is a stampede in the artificial intelligence (AI) market where around 60 startups have appeared, many of which have already … Read More
Chips are the bleeding edge of China trade war Recovery
Last week we warned of a further down leg due to China trade. We were surprised how quickly our prediction came true as it appears we are now in the midst of giving back all the upside built in to stocks based on a peaceful resolution of the trade conflict which obviously isn’t happening.
Many of the semi stocks we cover were down… Read More
A Quick Tour Through Prompt Engineering as it Might Apply to Debug