Staff Hardware Verification Engineer

What You’ll Do as a Hardware Verification Engineer at Arteris

Join our innovative team and help shape the future of semiconductor technology, specifically system-on-chip (SoC) and chiplets. In this role, you will contribute to design, implement, and execute robust verification strategies to ensure the correctness, performance, and reliability of complex hardware IP and interconnect solutions., collaborating with cross-functional teams to drive impact across cutting-edge products and solutions.

Key Responsibilities

• Define, document, develop and execute RTL verification test/coverage for extremely parameterized IPs in Python and C++, capable of running on any available RTL simulator (Cadence, Synopsys, etc.).
• Maintain and improve verification workflows.
• Improve metrics and increase automation.
• Implement verification components such as BFMs or monitors used in verification test benches.

What You Bring

• At least 4 years of industry experience as a verification engineer.
• Understanding of hardware RTL design and verification languages (VHDL, Verilog, SystemC, C++, Python, SystemVerilog).
• Strong experience in the use and development of verification methods and infrastructure (VIPs, UVM, testbeds, EDA tools).
• Experience in formal proof verification methodology is a plus
• Shell scripting experience
• Understanding of hardware communication protocols (AMBA, OCP, others)
• Curious, autonomous, rigorous and results-oriented, with a commitment to quality and a thorough approach to work.
• Proven ability to work well in a team environment
• Fluent English is a must.

Bonus Points If You Have

• Knowledge of interconnect technology is a plus
• Knowledge of Polish and/or French

Education Requirements

• Master’s degree or Doctorate in engineering or computer science

Estimated Base Salary  

Between 160 000 PLN and 260 000 PLN annually