Webinar PQC SemiwikiV4

Lead Design Engineer

Lead Design Engineer
by Admin on 02-27-2020 at 1:29 pm

Website Cadence

  • Derive the test plan based on the PHY protocol, device architecture and the application
  • Executing the tests based on the test plan
  • Analyze the Test results and debug failures
  • Work with the Systems team and test for system inter-operability
  • Experience in using lab equipments such as Oscilloscopes, Network Analyzer, Bit Error Rate Tester (BERT) etc.
  • Familiarity with Verilog, Labview, python
Apply for job

To view the job application please visit cadence.wd1.myworkdayjobs.com.

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