IC Analog IC Layout 800x100

Intern AE – PDK Creation and Design Studies (f/m/d)

Intern AE – PDK Creation and Design Studies (f/m/d)
by Admin on 04-08-2020 at 1:24 pm

  • Internship
  • Munich

Website Cadence

Position Description:

In a current project you will support the PDK (Process Design Kit) development for integrated circuits which includes creation of parameterizable layout cells (PCells) and testing of simulation models with Cadence’s simulators. You will also support design studies in Virtuoso Design Platform with the implemented PDK. This will be done in collaboration with multinational team members.

This is a great opportunity to gain in depth experience in EDA tools and to get familiar with the semiconductor design and methodologies. You will also get the chance to see how a worldwide operating company works. In this internship there are few limits; it’s up to you to decide how much you want to deepen your knowledge and push for personal excellence.

Position Requirements:

  • Education: MSc/MEng student, preferred in micro-electronics engineering
  • Understanding of IC Design
  • Good communication skills (fluent in English)
  • Being a team player
  • Problem solving skills
Apply for job

To view the job application please visit cadence.wd1.myworkdayjobs.com.

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