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Director, Interconnect Architectures and IP/EDA

Director, Interconnect Architectures and IP/EDA
by Admin on 04-23-2020 at 2:39 pm

Website GlobalFoundries

Summary of Role:       

GlobalFoundries seeks an experienced Director for their Interconnect Architectures and IP/EDA division. You will be responsible for GLOBALFOUNDRIES activities involving network-on-chip and chip-to-chip interconnect solutions for the computing and wired infrastructure business unit, encompassing electrical and photonic interface design and IP/EDA.  This is a senior level position requiring deep industry insights and domain expertise including low power network-on-a-chip interconnect architectures, low-power high speed serial and parallel interfaces, system partitioning including 2.5D/3D  (IOD) interconnect requirements, interface IP and EDA flow for implementation of SoC and packaged multi-die solutions.  Target applications for open protocol and proprietary interconnect solutions include wired infrastructure and aggregation (5G BS), datacenter ethernet connectivity and switching (NIC, ES), high performance compute (x86, RISC-V, CPU, GPU NoC, AI accelerators), high bandwidth memory and storage systems (HBM2e, SATA), and emerging photonic die-to-die massive scale-out systems. A key role is definition of technology and IP/EDA differentiation for a foundry value proposition for interconnect solutions over a planning time horizon in excess of 5 years.   It is expected that an individual filling this role would be an industry luminary and become the trusted advisor and subject matter expert for the enterprise for low power/high bandwidth interconnect.

The ideal candidate will have had experience in chip design and market segment requirement definition, including industry size and scope, with a thorough comprehension of the IP/EDA interconnect design cycle.  Design experience and participation in standards including but not limited to IEEE 802.3bs, 802.3cd, PCI_Express, AIB, OIF-CEI-4.0, 112G-XSR, (LP) DDR is desired.  Essential responsibilities and deliverables of this role include creation of market segment requirement documentation (MRD), indicating key industry trends and key application drivers over both tactical and strategic time horizons.  The segment plan will include target customers, technology/IP and product intercept timelines, as well as a complete competitive landscape analysis.  A key focus of this role is identification of disruptive system architectures or technology inflections, which can drive new product paradigms.   Monitor and report on market trends and competition and assess the impact on GLOBALFOUNDRIES business, prepare collateral for enablement, technology development, and sales and marketing organizations, behave as a interconnect system evangelist for the enterprise.

It is expected that the individual filling this role would be a subject matter expert for the enterprise for low power interconnect solutions, reporting directly to the CTO of Computing and Wired Infrastructure.

Required Qualifications:     

Bachelor’s Degree in Electrical Engineering, Computational Engineering or Related Discipline

  • 10 or More Years of Experience in the Semiconductor Segment
  • 5 or More Years of Experience as an Individual Contributor in Low Power/High Bandwidth Interconnect Systems
  • 5 or More Years of Experience in Deep Segment Product Architecture knowledge,
  • 5 or More Years of Design Experience in SoC and 2.5D/3D interconnect
  • Minimal Travel Required
  • Language Fluency:  English (Written & Verbal)
  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs

Preferred Qualifications:

  • Master’s Degree and or PhD in Electrical Engineering, Computational Engineering or Related Discipline
  • MBA Preferred
  • Industry contacts and solid network in the semiconductor and IP/EDA ecosystem
  • Industry luminary:  participant on academic and industrial standards organizations
  • Experienced speaker at industry level conferences and workshops
  • Computer systems architect, chip design, EDA
  • Strong team player with a positive attitude and proactive work ethic
  • Ability to identify opportunities and independently pursue
  • Experience in working with international and diverse teams and with multiple levels of management
  • Excellent verbal and writing skills.  Good communicator and comfortable presenting to executive audiences
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To view the job application please visit gfoundries.taleo.net.