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ASIC Physical Designer

ASIC Physical Designer
by Admin on 10-13-2023 at 10:55 am

Working on the front end TFM(Tools, Flows & Methodologies), you will be required to develop, qualify and deploy the TFM solutions

for complete front end system including functional and formal verification, emulation and FPGA prototyping that are critical to enabling Intel SoC with a feature complete flow from RTL to GDS.

Your major accountabilities include but are not limited to Development, deployment and support of functional verification flow including:

• Development and deployment of functional verification flow involving simulation, formal property verification, emulation & FPGA prototyping solutions

• Deployment of these flows to several projects in Intel

• Implementing the feedback/learnings from the deployment activities into the TFM solutions.

• Meeting the quality requirements for the flows and solutions

• Triage issues found and fix the TFM solutions as appropriate

• Triage issues found and coordination with EDA vendors

Required Skills

• Excellent knowledge of PERL, Makefile, Python, SystemVerilog

• Extensive hands on experience with industry standard simulation, formal property verification, emulation & FPGA prototyping tools

• Knowledge of the ASIC design flow.

• Good with debugging techniques

• Knowledge of digital design fundamentals and VLSI design fundamentals

Additional skills:

• Expertise with VHDL

• Ability to act as ambassador for new technologies and actively engage with global cross-site teams

• Excellent communication and presentation skills

• Ability to work independently, prioritize, manage risks, evaluate tradeoffs, make quick decisions and communicate project status

• Interfacing with multiple customers, understanding their requirements, setting expectations and delivering on commitments.

• Ability to work with hardware and software teams developing advanced technologies using design and SW best practices

• Analytical problem solving, team oriented and ability to work in a collaborative environment

Qualifications

  • B.Tech or M.Tech in Electronics/Electrical Engineering/Computer science
  • 2+ years of hands-on experience in simulation/emulation/formal property verification
  • We need people with functional verification (simulation / emulation) background.
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