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Develop High Performance Machine Vision in the Blink of an Eye

Develop High Performance Machine Vision in the Blink of an Eye
by Paul McLellan on 08-21-2014 at 7:01 am

The growing capabilities of silicon along with improved algorithms means that machine vision is becoming increasingly important since more and more systems can be built in such areas as manufacturing, intelligent traffic management, bar code scanning, counterfeit detection and even sports simulation. Is that a 3X driver? No, it’s a 3 wood.

The traditional approach would use and FPGA for frame-grabbing and then a PC to do image analysis. The FPGA was fast and flexible and could do some pixel level processing; the PC was easy to program and there were lots of open source algorithms. Now the best of both worlds can be combined in a Xilinx Zync-7000 all-programmable system with the FPGA for speed and real-time response and the processor for the software environment. No PC, no cable bottlenecks, small and power efficient. What’s not to like?

Above is a video to show the difference, made at the SPS/IPC Drives conference held in Nuremburg earlier this year. To compare the old way of doing things to the new, Xilinx built two implementations.

  • HALCON machine vision software runs on the Cortex-A9 in the Zync but the FPGA fabric is not used. Result: 16 frame per second (fps) with 50% error rate
  • FPGA used for image processing. No errors even when running at 90 fps


So how do you program one of these machine vision systems. The old way would be to learn a hardware description language if you don’t already know one (and if you are a software guy you almost certainly don’t). Or you can use embedded Visual Applets (eVA) from Silicon Software and accelerate your productivity. There are over 200 machine vision operators and they map directly into the FPGA. So even though you are a software guy you can do hardware design!


The design entry is done at a very high level. But the code efficiency is very close to hand-crafted HDL. This produces extremely short design cycles. Like 15 minutes. Obviously great for time-to-market, ease of experimentation and more. It is intended for software engineers, application engineers and machine vision experts. FPGA programming skills are not required. The eVA core is completely inside the glue logic all on the same silicon fabric.

Programming is a four step process:
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  • Enter eVA platform description in a simple XML file. Image and output ports, memory interfaces, FPGA type, clock, bit width and so on
  • Generate the eVA platform installer which produces a VHDL/Verilog black box and testbench to integrate, simulate and synthesize the generated IP code. Your platform is now ready to use Visual Applets in the next step
  • Design your application. Just install the VA and the platform installer. Simple verification with the built-in DRC, simulation and bandwidth analyzer tools
  • One click build in VA generates the bitstream to program the FPGA along with an SDK C-code for easy integration and GenlCam XML file and C-code API for parameterization. You can then use it!

    To see a webinar on this topic, go here. Learn more about Xilinx Smarter Vision here.

    Coming up soon is the Avent-Xilinx XFest (not specifically focused on vision). This is a grand international tour. First pick your city:

    • US: Irvine | San Diego | San Jose | Boston | Baltimore/North Virginia/DC | Minneapolis | Dallas | Toronto | Vancouver | Montreal | Chicago
    • Europe: Gaydon, Warwicks | Oslo | Madrid | Antwerp | Milano | Paris | Stuttgart | Odense | Warsaw
    • Asia: Beijing | Xian | Sydney | Singapore | Shanghai | Shenzhen | Seoul | Guangzhou | Chengdu | Shenyang | Nanjing | Hsinchu | Bangalore | Taipei | Hangzhou
    • Japan: Tokyo | Osaka

    Then find out dates and to register to attend XFest here. It’s free.


    More articles by Paul McLellan…