The FPGA Blob is Coming…

I never understood when I was a kid how ‘the Blob’ could actually catch someone but it sure did. It caught the unsuspecting, the off guard. I mean you’d have time for a soda and shower if you saw it on your road. And no, your manager is not the Blob; don’t think like that, it’s always his boss. The blob comes to consume the worker who was unaware that they could leave at 4pm on a Friday to avoid the next mini design crisis; only to learn they did not need your FPGA fix, it was the software reading the wrong register all the time.

I better write something techy… So do you know what I liken the Blob to? The FPGA… Yikes that at the surface does not sound like a compliment but it is and maybe when I’m done, you’ll want to be the blob too. I better stop.

Over the last decade have you noticed what the FPGA has consumed from your marvelous circuit board? Hmm, have you? I have seen the FPGA Blob personally eat whole RADAR Chassis into one part. Now that is blobbish. We are not only doing more math in FPGAs, but handling massive amounts of IO. The IO is how the Blob eats and spits out data. No more propriety IO chips, implement whatever you want. The Blob loves ‘À la carte’. Shoot, even Richard Simmons can’t stop this thing. VPX FPGA COTS boards have an IO FPGA tied to the VPX high speed fabric. That means that board could use SRIO, PCIe etc… and is not locked into a particular ‘open’ (That’s funny) architecture.

Remember the bridge chips? I do… It makes me wonder what else going to be consumed? I have some ideas but will keep them with me for now. The major question I have is what will be left for the microchip makers? Am I really going to buy a video encoder/decoder chip? Memory is safe but everything else is fair game. Could it be that in the future instead of say TI making chips solely, is that it also designs IP for some FPGA house? Thus the single chip IP solutions will find themselves as hardened IP or even soft for that matter in an FPGA. I do not know many engineers at this point using the SHARC Processors, why? Well the FPGA’s are doing much of that DSP now. Blobbed.

It really is a new reality for FPGAs and I like what NVIDIA is starting to think about which is ‘Network on a Chip’, Yes we do need a System on a Chip (My Kids Actually think that is a dip) but that System needs to talk to other Systems over a medium called a network. Who is the biggest FPGA Blob victim you ask? ASIC’s! I remember the days considering the trade space of ASIC vs. FPGAs. No longer is the ASIC a real competitor in the way we used to think of them. In fact IBM laid off many employees from its ASIC division last month, no doubt due to the FPGA blob in part. You see the Blob can change shape, unlike the ASIC it is very flexible just like our friend the FPGA. The Blob is coming and there is no stopping the momentum, just don’t get eaten.

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