Webinar: Signal Integrity Issues for Silicon Interposers

Webinar: Signal Integrity Issues for Silicon Interposers
by Admin on 01-11-2023 at 2:58 pm

The development of applications like high-performance computing, Artificial Intelligence (AI) processors, and Central Processing Unit (CPU) and Graphical Processing Unit (GPU) chips involves advanced packaging technologies that radically alter traditional design methodologies and flows. Designers of high-speed

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Second IEEE International Workshop on SLM (Silicon Lifecycle Management)

Second IEEE International Workshop on SLM (Silicon Lifecycle Management)
by Admin on 09-16-2022 at 2:04 pm

HYBRID FORMAT
SEPTEMBER 29-30, 2022

AIM OF THE WORKSHOP

With increasing system complexity, security, stringent runtime requirements for functional safety, and cost constraints of a mass market, the reliable and secure operation of electronics in safety- critical, enterprise servers and cloud computing domains is still … Read More


FSiC 2022 – Free Silicon Conference

FSiC 2022 – Free Silicon Conference
by Admin on 06-22-2022 at 1:38 pm

The 2022 Free Silicon Conference (FSiC) will take place in Paris (Sorbonne) on July 7,8,9 2022 (Thursday to Saturday). This event will build on top of the 2019 edition. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated

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Arm and Cadence: Achieving Best Silicon Power, Performance, and Area

Arm and Cadence: Achieving Best Silicon Power, Performance, and Area
by Admin on 04-19-2022 at 4:13 pm

Join Cadence and Arm to learn how you can achieve the best power, performance, area (PPA) and time to tapeout for Arm® CPU implementation using the latest Cadence® Digital Full Flow. This event covers topics including high-performance design for the Arm Cortex®-A710 and other Arm processors, energy-efficient CPU implementation

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D&R IP SoC Silicon Valley 2022

D&R IP SoC Silicon Valley 2022
by Admin on 03-03-2022 at 2:22 pm

When : April 26th 2022

Where : Computer History Museum
1401 N. Shoreline Blvd
Mountain View, CA 94043, USA

D&R IP-SoC Silicon Valley 2022 Day is the unique worldwide Spring event fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems.

IP-SoC providers, the seed of innovation in Electronic Industry,… Read More


GSA Silicon Leadership Summit

GSA Silicon Leadership Summit
by Admin on 12-23-2020 at 9:17 am

Event Details

Save the date for in April 2021, and see our CEO Luc Seraphin speak at the GSA Silicon Leadership Summit.

The 2020 Silicon Leadership Summit is GSA’s global technology and business conference and a unique platform that brings together over 250 senior executives… Read More


Technology Day: Adopting Effective Power Analysis Strategies from System to Silicon

Technology Day: Adopting Effective Power Analysis Strategies from System to Silicon
by Admin on 06-16-2020 at 6:41 am

Overview

Power analysis is critical throughout the lifecycle of a program. Effective power analysis requires different strategies and tools depending on where you are in that lifecycle. In this webinar, we will cover the Cadence® solutions for power analysis starting with early system-level analysis, through RTL-level architecture/

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Webinar: Conformal 2020 Updates to Improve Productivity and Silicon Success

Webinar: Conformal 2020 Updates to Improve Productivity and Silicon Success
by Admin on 05-26-2020 at 11:38 pm

Overview

As designs grow in complexity, rigorous formal verification is essential to meet aggressive requirements for power, performance, area, and time to market. Equivalence checking, static verification, automated ECO, and constraint design for clock domain crossing (CDC) are some of the challenges that signoff designers

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Making AI Silicon Smart with PVT Monitoring

Making AI Silicon Smart with PVT Monitoring
by Tom Simon on 11-26-2018 at 7:00 am

PVT – depending on what field you are in those three letters may mean totally different things. In my undergraduate field of study, chemistry, PVT meant Pressure, Volume & Temperature. Many of you probably remember PV=nRT, the dreaded ideal gas law. However, anybody working in semiconductors knows that PVT stands … Read More