Agentrys Weighs in on LLM Benchmarking for Chip Design at DAC 2026

Si2 is conducting quite a few sessions at DAC this year covering everything from power model standards to agentic AI. There is one session that is a bit different, focusing on LLM benchmarking. Since AI is popping up everywhere, the ability to accurately assess and measure the quality of new models becomes more important. That’s why this session caught my eye. Agentrys is participating in this important session. If AI is in your future and you’re going to be at DAC, this session will offer some useful guidance. Let’s look a bit closer as Agentrys weighs in on LLM benchmarking for chip design at DAC 2026.

Background on the Event

The Si2 LLM Benchmarking Coalition is an effort under the Silicon Integration Initiative focused on advancing empirical evaluation for AI in chip design. At this special session, coalition members and guests will present a strategic outlook and an industry panel discussion.

To provide some context, the goal of the LLM Benchmarking Coalition is to bring together high-quality AI-for-chip design datasets into a consistent, reproducible format, operate a centralized

leaderboard maintained by Si2 staff, and as a community, establish reporting standards for how these benchmarks are used in the literature. More broadly, the aim is to align the field around shared evaluation, improving benchmarks collaboratively rather than having them compete in isolation.

This kind of approach should improve the quality and speed of successful AI deployment for chip design. You can find more details about this important effort here.

Speakers and Topics

The moderator of the panel is Dr. Leigh Anne Clevenger, Vice President, Technology at Si2.  She has been with Si2 for almost eight years and has focused on efforts to identify and solve industry needs in applying artificial intelligence and machine learning to electronic design automation tools. Before Si2, she was at GlobalFoundries and IBM. She is the right person to lead this session.

The event is composed of two sessions. In the first, two distinguished speakers will present on relevant topics:

Dr. Nathaniel Pinckney is Senior Research Scientist at Nvidia.  He has been at Nvidia for 11 years. Previously he was at Oracle, Qualcomm, and Sun Microsystems. He will present an Introduction to LBC (Library Credits) and a Strategic Outlook.

Dr. Jan Ernst is Research Scientist at Normal Computing. Ernst recently received a Ph.D. in atomic and laser physics from the University of Oxford and will present Evaluating AI Agents In the Real (EDA) World.

Following the presentations, the event will move to an industry panel discussing Aligning Agentic Benchmarking and Verification Methods with Real-World EDA Workflows. This is where I believe the event will get quite interesting. The panelists are:

Mark Ren, Founder & CEO of Agentrys

Hamid Shojaei, Distinguished Engineer at Cadence Design Systems

Renu Mehra, Vice President, Engineering at Synopsys

Scott Fields, Senior Director of Engineering, NVIDIA

I believe this will be compelling discussion. This is where folks on the front line of progress get to discuss and debate how benchmarking of agentic technology fits in the real world against real EDA workflows.

Clearly Cadence, Synopsys and Nvidia have already developed a massive infrastructure using traditional technology that has been developed over many years. How to measure the impact of genuinely new technology on these “tried and true” flows will be an interesting challenge.

And then there’s Mark Ren and Agentrys, a high-profile startup that is taking a completely different approach to the problem. Contemporary chip development depends on long-running, complex, repeatedly executed engineering workflows that require significant manual effort and engineering judgment.

In contrast, Agentrys automates these workflows and keeps improving them, eventually surpassing expert-level design capability. This is accomplished with something called Agentic Design Automation. The technology facilitates the development of a continuously improving agentic design capability that learns from the customer’s designs, runs on the infrastructure the customer trusts, and gets better with every project.

This is a sharp contrast to conventional methods. I’m looking forward to seeing how traditional and new approaches fit, and this panel will help illuminate that.

To Learn More

If you worry about the quality of future agentic design methods, this panel is important. If you’re at DAC, you must attend. The panel will be held July 27^th from 1:00 PM – 2:30 PM in meeting room 104C at the Long Beach Convention Center. As stated in the graphic at the top of this post, the first 50 people will get a free lunch.

Here is more information about the event from the DAC program. And here’s a place on SemiWiki where you can learn more about Agentrys and its unique approach. I hope you can attend and see how Agentrys weighs in on LLM benchmarking for chip design at DAC 2026.