J38701 CadenceTECHTALK Automotive Design Banner 800x100 (1)
WP_Term Object
(
    [term_id] => 50
    [name] => Events
    [slug] => events
    [term_group] => 0
    [term_taxonomy_id] => 50
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 1311
    [filter] => raw
    [cat_ID] => 50
    [category_count] => 1311
    [category_description] => 
    [cat_name] => Events
    [category_nicename] => events
    [category_parent] => 0
)

DAC 2012 – Sunday Night Kick Off

DAC 2012 – Sunday Night Kick Off
by Daniel Payne on 06-03-2012 at 10:45 pm

I arrived to a sunny San Francisco this afternoon, checked into my hotel then visited Moscone Center to pick up my Independent Media credentials. On the walk over I passed by Yerba Buena Gardens.

Next step is the EDAC-sponsored kick-off reception which is a wonderful time to reconnect with EDA and semiconductor colleagues from around the world to reminisce about the good old days of EDA when DAC took up both the North and South Halls of the convention center. Rumor has it that attendance in DAC 2012 is up some 40% from last year, impressive growth.
Where else can you walk up and chat with Art de Geus of Synopsys, or Wally Rhines of Mentor Graphics?

The Chair for DAC spoke some words from a prepared speech (next time speak from the heart), followed by Wally Rhines of Mentor Graphics, who did speak from the heart.

Gary Smith
After an hour of networking and finger food it was time for Gary Smith to expound next door to the EDAC reception.

Here are my notes:


Multi-platform based design (Sharon Tan & Gary Smith).

Four hand-outs this year: ESL, EDA, CAD-CAM (still not alphabetized), multi-platform based design.

I Was Wrong – cost $75 million to design the average high-end mobile SoC; way over $50 million.
– Companies came back and said, “Wrong”.

Changes in 2011
– used already developed SW
– used IP with verificatin suites
– fewer total blocks
– costs at $39.8 million, closer to $25 million start-up cost threshold

What is Multi-platform based design?
– use existing platforms
– add new content

Advantages?
– lower costs, up to 40% less than before

Example
– Application platform (last platform, most fluid, has a short lifespan, in house or proprietary,
– Functional platform (base for the SoC, core like ARM or Intel, often 3rd party, no competitive advantage)
– Foundation platform (differentiation starts here, Qualcom Snapdragon or TI OMAP

Example from Audi
– ARM Cortex A9 (functional)
– foundation, Nvidia Tegra 2
– Application: differentiator

GPS or GPU
– started out as a new Application Platform
– if popular it becomes less differentiated

Applications Platform – this is where all of the differentiation happens, first into the right application has the biggest advantage, hard to play catch up to leaders

Gary Smith – library development tools are not the same as system tools.
– First ever multi-platform wallchart
– Intel and Microsoft formed the king of all platforms
– IBM created the PC in 1981 however by 1991 Intel was the driver of the PC platform (now the #1 semi company)

EDA 2011 – The Numbers
– 12% growth in 2011 compared to 2010, $4.989B (from $4.453B)
– 2012 predicted at $5.635B
– 2013 $6.035B

ESL – $460M, 75% growth in 2011, driven by Verification
– 1990 at $2M annually
– 2010 $262M
– 2009 $204M
– 2008 $231M
– HLS is grouped into ESL, verification, many-core SW development tools

Silicon Virtual Prototype (SVP)
– The Architect’s Workbench (behavioral level)
– HW prototype
– SW prototype

History of SVP
– 1996 internal SVP
– 1997 to 2007 Power users create own SVP
– 2010 – Upper mainstream using ESL with commercial tools, not internal.

WHere is the SVP flow?
– ESL design entry (Excel spreadsheet)
– SW has a software virtual prototype
– ARchitectect’s workbench (with some connection between ESL and Software Virtual Prototype)

SVP goals
– hand off between Architect Workbench down to Software Virtual Prototype, including validation between Silicon Virtual Prototype and Software Virtual Prototype

SIlicon Virtual Prototypes
– SVP1, the design starts, hw accelerators added, Transactional Modeling Developed. In house plagforms designed.
– SVP 2 – existing RTL blocks inserted, System C blocks synthesized, design comleted, verified, Golden netlist is the output
– COuld be the same team

The Software VIrtual Prototype
– SWVP 1, the Architect’s WOrkbench, used by Arcchitectural team
– SWVP 2, application code written here
– SWVP 3 , firware is written here
– SWVP 4 – product markeing and sales verify design with early customers and prospects

SWVP – four different users, different functions, different specifications, four different price points
– how to get prices above $400 for typical SW buyer
– budgets shifting from EDA to SW departments

DAC – we need to see more embedded and sw people at DAC

The SPICE Numbers
– Jim Hogan created controversy by giving his SPICE market numbers. Cooley published and debate ensued.
– Where are the market share numbers ? (Come buy your report from GSEDA)
– No, you cannot have free SPICE numbers.

Son Casey at age 6 1/2 bullt a 3,803 piece Lego Death Star (recommended age 14).

Summary
The 49th annual DAC show looks to be exciting and ever-changing because of the sheer complexity of SoC designs being created and the move towards 28nm and 20nm designs. Stay tuned for a few dozen blog posts on what I learn over the next three days.

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.