Webinar: Cutting Full-Chip SoC Debug from Days to Minutes with AI

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Full-chip SoC debug has become one of the most expensive bottlenecks in modern verification. A single production issue can pull multiple engineers away days as they chase a failure through waveforms, logs, and across hundreds of thousands of lines of code.

In this webinar, we will demonstrate how the Bronco AI Debug Agent performs root-cause analysis (RCA) on real production issues in under 15 minutes, with a 70% success rate on customer regressions. You will see the agent operate end-to-end on a representative full-chip SoC, from a failing regression to an annotated root cause, while interoperating with customer’s standard commercial EDA flows.

What we will cover:

– Live demonstration of the Debug Agent on a full-chip SoC regression failure
– How the agent navigates massive codebases, logs, and waveforms to isolate failure mechanisms
– Deployment patterns at large public chip companies and as well as fast-moving startups
– How bring-your-own-model and on-prem deployment keep customer IP inside your environment.
– How Bronco gets better without ever training on customer data.

Who should attend:

– DV engineers and managers responsible for regression triage and production debug
– SoC verification leads evaluating AI-native tooling for their flows
– VPs of Engineering and Silicon leaders tracking DV cycle time and engineering ROI
– Security and infrastructure owners assessing on-prem AI deployment for chip design

Speaker:

David Zhi LuoZhang, Co-Founder and CEO of Bronco AI, will walk through the live demonstration on a real design and take questions how customers deploy, evaluate, and scale Bronco within their silicon projects. David works tightly with customers to deploy Bronco and coordinates between the core R&D, customer, and industry-relations teams at Bronco.

*This webinar is in partnership with SemiWiki and Bronco AI*

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