Live Event: Engineering the Future of AI Systems

The rapid acceleration of artificial intelligence (AI) workloads is placing unprecedented demands on system design, validation, and performance optimization. To address these challenges, Keysight Technologies presents its forward-looking event, Engineering the Future of AI Systems—a technical deep dive into the tools, methodologies, and measurement strategies required to build next-generation AI infrastructure.

The Keysight DES Roadshow brings together experts across Design & Verification, CAE, Software Test Automation, Data Management, and more to show how organizations can build a complete foundation for AI-driven engineering.

When: 4/29/26, 9:30 AM – 3:00 PM
Where: Keysight Offices, Santa Clara, CA

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This event is tailored for engineers, system architects, and R&D leaders working across data centers, high-performance computing (HPC), and advanced semiconductor ecosystems. As AI models grow in complexity—driven by larger parameter counts, distributed training, and real-time inference requirements—the underlying hardware and interconnect architectures must evolve in lockstep. Keysight’s session provides a rigorous examination of how to design, validate, and scale these systems efficiently.

At the core of the discussion is signal integrity and high-speed data transfer. AI systems depend heavily on ultra-fast interconnects such as PCIe Gen5/Gen6, CXL, and high-bandwidth memory interfaces. The event explores how engineers can accurately characterize channel performance, mitigate jitter and noise, and ensure compliance with emerging standards. Using advanced measurement techniques and simulation workflows, Keysight demonstrates how to reduce design risk while accelerating time-to-market.

Another focal point is power integrity and thermal management—two critical constraints in dense AI compute environments. As GPUs and AI accelerators push power envelopes higher, maintaining stable voltage delivery and managing heat dissipation becomes increasingly complex. The event outlines best practices for dynamic power analysis, transient response validation, and system-level thermal modeling. These insights are essential for sustaining performance under real-world workloads while avoiding reliability issues.

Keysight also addresses the growing importance of co-design across hardware and software layers. Modern AI systems are no longer optimized in silos; instead, they require tight integration between silicon design, firmware, and application workloads. The event highlights how measurement-driven design approaches can bridge these domains, enabling engineers to validate performance against actual AI use cases rather than synthetic benchmarks alone.

In addition, attendees will gain exposure to cutting-edge test automation and digital twin methodologies. By leveraging virtual prototyping and automated validation frameworks, engineering teams can iterate more rapidly and identify bottlenecks earlier in the design cycle. Keysight showcases how these techniques reduce costly redesigns and improve overall system robustness.

The event also touches on scalability challenges in AI clusters and hyperscale data centers. Topics include high-speed networking validation, synchronization across distributed systems, and latency optimization. As AI workloads increasingly rely on parallel processing across thousands of nodes, ensuring deterministic performance and minimal communication overhead is crucial. Keysight’s expertise in network emulation and protocol testing provides actionable guidance for addressing these issues.

A distinguishing feature of Engineering the Future of AI Systems is its emphasis on practical application. Rather than remaining purely theoretical, the session incorporates real-world case studies and measurement scenarios drawn from leading-edge AI deployments. This approach allows participants to directly translate insights into their own design and validation workflows.

Ultimately, this event positions Keysight at the forefront of AI system engineering, offering a comprehensive toolkit for tackling the most pressing technical challenges in the field. For organizations striving to remain competitive in the AI race, the ability to design reliable, high-performance systems is no longer optional—it is foundational.

By attending, engineers will not only deepen their understanding of AI infrastructure complexities but also gain access to proven methodologies that streamline development and enhance system confidence. In an era where innovation cycles are shrinking and performance expectations are soaring, Keysight’s expertise provides a critical advantage in engineering the future of AI systems.

Agenda

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Breakout Sessions

Design and Verification

• • • The AI Hardware Challenge: Why Next-Generation Design Requires a New EDA Platform
      Understand the growing complexity of AI hardware and why unified EDA platforms are essential to scale design, simulation, and verification.
    • AI-Designed Analog Chips: From Research to Real-World Design
      Explore how AI is transforming analog design with real-world examples and forward-looking insights.
    • PowerArtist: Building Energy-Smart Chips
      Learn how early RTL power analysis enables faster, more efficient chip design and helps prevent costly late-stage issues.

Software Test Automation

• • • Testing from an End User’s Perspective with Keysight Eggplant
      Validate software exactly as users experience it, moving beyond scripts with AI-driven testing.

Computer-Aided Engineering

• • • Virtual Prototyping Redefined
      Accelerate development with predictive, real-time, and immersive simulations across multiphysics domains.

Engineering Data Management

• • AI-Ready Engineering Data: Preparing for AI with SOS Enterprise
    Transform fragmented design data into structured, governed, AI-ready assets that enable scalable innovation.

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Also Read:

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WEBINAR: Beyond Moore’s Law and The Future of Semiconductor Manufacturing Intelligence

When a Platform Provider Becomes a Competitor: Why Arm’s Silicon Strategy Changes the Incentives

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