Webinar: Unlocking the Potential of CXL 3.1 and PCIe 6.1 for Next-Generation Data Centers

Webinar: Unlocking the Potential of CXL 3.1 and PCIe 6.1 for Next-Generation Data Centers
by Admin on 02-12-2024 at 4:31 pm

Increased demand for bandwidth, capacity and compute, coupled with the implications for increased data center costs, are the realities of the AI revolution. This is driving the need for new disaggregated architectures in the data center. Join Lou Ternullo to learn about how PCIe 6.1 and CXL 3.1 interfaces are evolving to address… Read More


CEO Interview: Sanjeev Kumar – Co-Founder & Mentor of Logic Fruit Technologies

CEO Interview: Sanjeev Kumar – Co-Founder & Mentor of Logic Fruit Technologies
by Daniel Nenni on 10-06-2023 at 6:00 am

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Sanjeev is a renowned technopreneur in the semiconductor industry. With more than 20+ years of experience, he is known for his enormous resilience and deep tech knowledge that sets him apart from others in the industry.

Sanjeev started his career as a hardware designer and then forayed into the FPGA domain due to his love for configurable… Read More


Why Secure Ethernet Connections?

Why Secure Ethernet Connections?
by Daniel Payne on 05-29-2023 at 6:00 am

Ethernet Security min

While web browsing I constantly glance for the padlock symbol to indicate that the site is encrypting any of my form data by using the https prefix, which means that an SSL (Secure Sockets Layer) certificate is being used by the web hosting company. I have peace of mind knowing that my credit card information cannot be easily stolen… Read More


Chiplet Interconnect Challenges and Standards

Chiplet Interconnect Challenges and Standards
by Daniel Payne on 05-25-2023 at 10:00 am

Multi die IP min

For decades now I’ve watched the incredible growth of SoCs in terms of die size, transistor count, frequency and complexity. Instead of placing all of the system complexity into a single, monolithic chip, there are now compelling reasons to use a multi-chip approach, like when the maximum die size limit is reached, or it’s… Read More


Optimization Tradeoffs in Power and Latency for PCIe/CXL in Datacenters

Optimization Tradeoffs in Power and Latency for PCIe/CXL in Datacenters
by Daniel Nenni on 02-13-2023 at 10:00 am

Power Latency Webinar min

PCI Express Power Bottleneck

Madhumita Sanyal, Sr. Technical Product Manager, and Gary Ruggles, Sr. Product Manager, discussed the tradeoffs between power and latency in PCIe/CXL data centers during a live SemiWiki webinar on January 26, 2023. The demands on PCIe continue to grow with the integration of multiple components… Read More


How to Efficiently and Effectively Secure SoC Interfaces for Data Protection

How to Efficiently and Effectively Secure SoC Interfaces for Data Protection
by Kalar Rajendiran on 01-04-2023 at 6:00 am

secure interfaces article fig1

Before the advent of the digitized society and computer chips, things that needed protection were mostly hard assets such as jewelry, coins, real estate, etc. Administering security was simple and depended on strong guards who provided security through physical means. Then came the safety box services offered by financial … Read More


Webinar: PCIe/CXL Latency and Power Considerations for HPC SoCs

Webinar: PCIe/CXL Latency and Power Considerations for HPC SoCs
by Admin on 12-15-2022 at 3:53 pm

*Company email required for registration*

If you are designing chips for high-performance computing (HPC) and data center applications, bandwidth is, of course, a key consideration. However, as data centers get bigger and the required compute power increases, keeping power consumption to a minimum becomes a priority. In

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Webinar: How CXL Technology will Revolutionize the Data Center

Webinar: How CXL Technology will Revolutionize the Data Center
by Admin on 10-31-2022 at 2:13 pm

Data Centers face many challenges in an environment of exponentially rising data volume growth. With workload demands increasing rapidly, the need for more bandwidth and capacity continues to rise. We’ve reached the point where half of server bill of materials (BoM) costs are for memory. How can we make the best use of this investment?

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Verification IP Hastens the Design of CXL 3.0

Verification IP Hastens the Design of CXL 3.0
by Dave Bursky on 09-21-2022 at 6:00 am

cxl standards 1

Although version 2.0 of the Computer Express Link (CXL) standard is just making it into new designs, the next generation, version 3.0, has been approved and is now ready for designers to implement the new silicon and firmware needed to meet the new standard’s performance specifications. CXL, an open industry-standard interconnect,… Read More


Truechip: Customer Shipment of CXL3 VIP and CXL Switch Model

Truechip: Customer Shipment of CXL3 VIP and CXL Switch Model
by Kalar Rajendiran on 09-12-2022 at 10:00 am

CXL Block Diagram

The tremendous amount of data generated by AI/ML driven applications and other hyperscale computing applications have forced the age old server architecture to change. The new architecture is driven by the resource disaggregation paradigm, wherein memory and storage are decoupled from the host CPU and managed independently… Read More