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Empyrean Logo SemiWiki 
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Empyrean
Posted on by Daniel Payne

Circuit Simulation Update from Empyrean at #61DAC

Circuit Simulation Update from Empyrean at #61DAC
by Daniel Payne on 08-13-2024 at 10:00 am
Categories: EDA, Empyrean

A familiar face in EDA, Greg Lebsack met with me in the Empyrean booth at DAC this year on opening day to provide an update on what’s new. I first met Greg when he was at Tanner EDA, then Mentor and Siemens EDA, so he really knows our industry quite well. The company was a Silver level sponsor of DAC this year, and Empyrean offers tools for circuit verification, covering: Aging, Electrical Over-Stress (EOS), Monte Carlo, cell characterization, RF simulation, co-simulation, GPU-powered simulation, channel simulation, SPICE simulation. They also have EDA tools for RF, digital, flat panel design, foundry and advanced packaging design.

Empyrean SPICE min
SPICE simulators

I learned that their SPICE simulator running on GPU was popular, and as NVIDIA releases a new GPU, then the ALPS-GT tool quickly gets updated and released. In fact, NVIDIA is a customer of Empyrean and they use ALPS-GT for transient analysis and ALPFS-RF for harmonic balance simulations. A poster session on Tuesday was presented by both NVIDIA and Empyrean about using ALPS-GT:

  • GPU ACCELERATED HARMONIC BALANCE SPICE SIMULATION
    Qikun Xue, NVIDIA, San Jose, CA
    Chen Zhao, Empyrean Technology, Santa Clara, CA

Booth presentations showed Alps and Alps RF on both Monday and Tuesday. Other customers mentioned by Greg were MPS designing CMOS power supply chips, Diodes doing EM/IR analysis on power management ICs, and WillSemi running reliability analysis. PMIC designs are typically using 180nm process nodes, while the ALPS circuit simulator is also certified for use with the leading-edge Samsung 3nm node.

To support the six product lines at the company, they have grown to 1,200 people, up from 700 just two years ago. Tools in their digital SoC design space cover five areas:

  • Qualib – process library analysis and validation
  • Liberal – standard cell, memory and IP characterization
  • XTop – timing closure and ECO tool
  • XTime – timing and design reliability analysis
  • Skipper – layout integration and analysis
Empyrean DAC booth min
Empyrean DAC Booth

Summary

Every time that I meet with contacts at Empyrean the company has grown, and I learn about new customers and market segments being served. Their booth at DAC looked larger this year and included more staff than ever before. Having a tier-one customer like NVIDIA certainly grabbed my attention, and really cements Empyrean in this IC circuit simulation marketplace as a trusted EDA vendor. It’s a bit poetic how NVIDIA GPUs are being used to simulate new NVIDIA ICs, accurately and faster than ever before for both transient analysis and RF analysis.

Stay tuned on SemiWiki for updated news from this rising EDA vendor in blogs to come.

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