Scientific Analog XMODEL #61DAC

Transistor-level circuit designers have long used SPICE for circuit simulation, mostly because it is silicon accurate and helps them to predict the function, timing, power, waveforms, slopes and delays in a cell before fabrication. RTL designers use digital simulators that have a huge capacity but are lacking analog modeling. So, how would you simulate an AMS chip design quickly and accurately?

At #61DAC I met with Jaeha Kim, CEO and Founder of Scientific Analog to learn how their approach allows an SoC design and verification team to model Analog circuits in SystemVerilog and UVM by using a plugin called XMODEL. The secret sauce with XMODEL is how it models analog functionality inside of an event-driven simulator.

If you tried to digitize all the points in a continuous analog waveform it would make simulation too slow, instead with XMODEL there are equations that define the analog waveforms, and equations simulate quite fast and accurately. With XMODEL they are propagating analog outputs by using a Laplace transform on s-domains, where the simulator only has to compute something once per output equation.

I asked if XMODEL could be used to simulate something like a PLL, a typical AMS block that simulates very slowly in SPICE. Yes, with XMODEL a PLL can be simulated in SystemVerilog as dozens of pre-built primitives. Engineers would start with their SPICE or Spectre netlist and run the tool to automatically create a SystemVerilog netlist with XMODEL primitives. There are 220 XMODEL primitives to work with, and engineers may add their own XMODEL primitives, or ask Scientific Analog to add a new primitive. You won’t have to learn about writing something new and arcane like Real Number Modeling (RNM) with this XMODEL approach. Digital designers can run full chip AMS designs without being analog modeling experts by using XMODEL in their SystemVerilog and UVM simulations.

Engineers can also visually connect together XMODEL primitives with GLISTER by drawing schematics in Cadence Virtuoso, all without having to code anything. This approach allows you to check out the function of your analog idea before doing any detailed implementation work.

Chiplet design is growing in popularity and there’s an archived webinar on how to do UCIe PHY modeling and simulation with XMODEL at their site, and it goes into an overview of UCIe, an introduction to XMODEL, electrical layer modeling of transmit clock paths, then simulation results. Visitors can even download the slides and model package to get a better idea of how UCIe can be modeled using SystemVerilog.

More than 40 companies and universities are using XMODEL for their AMS design and verification, with names like: Samsung Electronics, Samsung Foundry, SK Hynix, Chinese Academy of Sciences, and Sung Kyun Kwan University. Scientific Analog is a member of the Si2 Open Access Coalition, and Accellera.

Verification engineers with big digital and little analog will greatly benefit from using XMODEL, and design engineers can quickly test out their new ideas before implementation begins. The XMODEL approach is much easier to learn and implement compared to using Verilog-A or Verilog-AMS. Analog designers don’t have to be afraid of learning SystemVerilog and UVM, because with XMODEL and MODELZEN they can quickly create something for their analog cells that can be used by their digital co-workers.

Another powerful use for XMODEL is with silicon photonics, as they process signals at the highest frequencies and using equations is always faster to simulate than digitized points. XMODEL has primitives designed for silicon photonics engineers. In fact, you can now simulate the combination of photonics, analog and digital circuits with XMODEL primitives today in SystemVerilog.

Scientific Analog was at #61DAC in June, DVCon US in February, DVCon Europe in October 2023, and they sponsored ASP-DAC in January 2023.

Summary

My visit with Scientific Analog was a fruitful one, as I learned how their unique technology called XMODEL allows analog modeling and simulation inside of SystemVerilog and UVM. The company has been around since 2015 and was founded in Palo Alto, CA, and now has distributors in Japan, China and North America. If you’re a design team doing AMS photonic designs, then I would give Scientific Analog a closer look for modeling, simulation and verification tasks.

Related Blogs

• WEBINAR: UCIe PHY Modeling and Simulation with XMODEL