Webinar: Modeling and Simulation of Silicon Photonics Systems in SystemVerilog

Webinar: Modeling and Simulation of Silicon Photonics Systems in SystemVerilog
by Admin on 08-08-2024 at 4:43 pm

About

Silicon photonics systems integrate photonic components such as optical waveguides, couplers, resonators, photodetectors, etc. along with electronic components on the same silicon chip to realize high-bandwidth, high-density, and low-power communication via wavelength-division multiplexing (WDM). This talk… Read More


AMIQ EDA Integrated Development Environment #61DAC

AMIQ EDA Integrated Development Environment #61DAC
by Daniel Payne on 07-29-2024 at 10:00 am

AMIQ EDA min

I stopped by the AMIQ EDA booth at DAC to get an update from Tom Anderson about their Integrated Development Environment (IDE), aimed at helping design and verification engineers save time. In my early IC design days we used either vi or emacs and were happy with having a somewhat smart text editor. With an IDE you get a whole new way … Read More


Scientific Analog XMODEL #61DAC

Scientific Analog XMODEL #61DAC
by Daniel Payne on 07-16-2024 at 10:00 am

Scientific Analog 61dac min

Transistor-level circuit designers have long used SPICE for circuit simulation, mostly because it is silicon accurate and helps them to predict the function, timing, power, waveforms, slopes and delays in a cell before fabrication. RTL designers use digital simulators that have a huge capacity but are lacking analog modeling.… Read More


Webinar: Enhancing Manufacturing Test Flows with Synopsys VC Z01X

Webinar: Enhancing Manufacturing Test Flows with Synopsys VC Z01X
by Admin on 06-26-2024 at 1:44 pm

Leveraging functional patterns is crucial for achieving high defect coverage and reducing defective parts per million (DPPM) levels. Synopsys VC Z01X fault simulator offers enhanced fault coverage in manufacturing test flows, complementing ATPG tools like Synopsys TestMAX ATPG. In this presentation we will delve into

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AMIQ EDA at the 2024 Design Automation Conference

AMIQ EDA at the 2024 Design Automation Conference
by Daniel Nenni on 06-20-2024 at 6:00 pm

DAC 2024 Banner

AMIQ EDA is a pioneer in integrated development environments (IDEs) for hardware design and verification and a provider of platform-independent software tools for efficient code development and analysis. We’ve been attending DAC for many years and are pleased to do so again in 2024. We exhibit at this show for several reasons.… Read More


Agnisys at the 2024 Design Automation Conference

Agnisys at the 2024 Design Automation Conference
by Daniel Nenni on 06-19-2024 at 8:00 am

DAC 2024 Banner

Agnisys Inc. a leader in design and verification automation for hardware development, is gearing up for an impactful presence at DAC 2024. This year’s participation will be marked by various activities designed to engage and inspire the electronic design automation (EDA) community. Attendees can look forward to our … Read More


Mirabilis Design at the 2024 Design Automation Conference

Mirabilis Design at the 2024 Design Automation Conference
by Deepak Shankar on 06-18-2024 at 10:00 am

DAC 2024 Banner

This is the first time in 28 years of my visits to DAC that I have seen so many different technologies arrive at DAC in the same year.  Earlier we would have one or possibly two innovative breakthroughs in semiconductors and embedded systems that emerged at DAC. This year I expect six or may be seven to arrive, and I am not including the… Read More


CEO Interview: Dieter Therssen of Sigasi

CEO Interview: Dieter Therssen of Sigasi
by Daniel Nenni on 06-07-2024 at 6:00 am

Dieter Therssen

Dieter Therssen obtained his master’s degree in Electronics Engineering from KU Leuven in 1987. He started his career as a hardware design engineer, using IMEC’s visionary tools and design methodologies in the early days of silicon integration.

Since then, Dieter developed his career across many digital technologies,… Read More


Fully Automating Chip Design

Fully Automating Chip Design
by Hans Bouwmeester on 05-23-2024 at 6:00 am

Figure 1
Design Productivity Gap

Twenty-five years ago, SEMATECH first alerted the world to a concern known as the design productivity gap: the observation that the ability to manufacture complex chips had started outpacing the capability of designers to create them by more than a factor of two. This concern was subsequently reiterated… Read More


CEO Interview: Dr. Nasib Naser of ORION VLSI Technologies.

CEO Interview: Dr. Nasib Naser of ORION VLSI Technologies.
by Daniel Nenni on 05-10-2024 at 6:00 am

Nasib Naser Picture

Dr. Nasib Naser brings over 35 years of experience in the field. His expertise spans the entire VLSI cycle from conception to chip design, with a strong focus on verification methodologies. For his 17 years at Synopsys, Dr. Naser have held senior management positions, leading North American Verification IP, managing Central … Read More