Siemens EDA’s Veloce emulation products are long-established and worthy contenders in any emulation smack-down. But there was always a hole in the complete acceleration story. Where was the FPGA prototyper? Current practice requires emulation for fast simulation with hardware debug, plus prototyping for faster simulation for software testing and debug. For Siemens that prototyping hole is now filled. They now offer the complete range: hardware acceleration platforms for enterprise-level emulation, enterprise-level prototyping and desktop prototyping. Good news all round, because ESDA is now showing that spend on hardware acceleration solutions is overtaking spend on conventional simulation.
This announcement is part of a broader announcement. The emulator, Veloce Strato, now has a higher capacity/performance sibling – Veloce Strato+. They’ve made multiple improvements for this system. First they’ve added the HYCON platform to co-model between the emulator and a virtual platform. You can run large software stacks on a virtual platform at near real-time speeds, jumping to the emulator (at lower speeds) only as needed.
Second, they have upgraded the compile flow to take advantage of hierarchy and distributed processing wherever possible. Here they take advantage of multi-CPU processors to accelerate throughput. Total verification turn-time is as much a function of compile time as much as run-time. A fact that comes home very quickly to designers dealing with frequent RTL drops.
New chip goes 2.5D
And third, Siemens EDA have spun a new accelerator chip, Crystal3+. Here they took the Strato board architecture and pushed the memory and processor into a 2.5D package. Increasing performance per processor (interposer delays to memory rather than board delays) and increasing the number of chips they can put on a board from 16 to 24. Interestingly, the chassis remains the same. You can simply pull out the Strato boards and replace them with Strato+ boards. AMD (Alex Starr) has been working with Siemens on this platform and has provided an endorsement. They’ve also endorsed models for the 2nd and 3rd-gen EPYC processors to work with this solution.
The Primo and ProFPGA prototypers
This is the big news for me. Primo is a full function prototyper with a datacenter footprint, with all the required features. ICE and virtual prototyping support, streaming to memory or host, multi-user support, down to one FPGA granularity. It shares a common compile front-end with Strato+ (as does the ProFPGA solution), minimizing turn-time to jump between platforms. And it also provides a common interface to the virtual modeling platform. Very neat. You can setup a complete verification environment, virtualized CPUs to RTL modeling to ICE/virtualized testbench and swap between emulation, enterprise prototyping and desktop prototyping.
Primo scales to 320 FPGAs and is based on the latest Ultrascale+ device from Xilinx. Arm has endorsed Veloce Primo.
Veloce ProFPGA is for desktop prototyping, developed in partnership with ProFPGA. Because that’s what you need when you want to work on a real (not virtualized) testbench, plugging into real traffic generators, consumers and monitors. You can scale from one uno board to 5 quad boards, with choices of Intel Stratix 10GX10M or Xilinx XCVU19P FPGAs.
Jean-Marie Brunet (Sr. Dir Marketing and more at Siemens EDA) mentioned that they also provide full visibility to signal states in both prototyping platforms, leveraging signal reconstruction technology from Veloce software.
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