Debugging Embedded Software on Veloce

Debugging Embedded Software on Veloce
by Bernard Murphy on 08-11-2021 at 6:00 am

Debugging Embedded Software on Veloce min

Arm provides great support for debugging embedded software in its CoreSight tools, but what support do you have if you’re debugging hardware and software together in a pre-implementation design? In a hardware debugger you have lots of support for hardware views like waveforms and register states. But these aren’t well connected… Read More


Veloce X-STEP optimizes O-RAN interoperability and conformance

Veloce X-STEP optimizes O-RAN interoperability and conformance
by Admin on 05-27-2021 at 12:00 am

In this webinar, we introduce the Veloce™ X-STEP™ platform, which is a fiber optic test system radio base station system designed with the highest possible timing accuracy and protocol configurability in mind. The patented Veloce X-STEP architecture allows full configurability of transmitted data full visibility into received… Read More


Siemens EDA Updates, Completes Its Hardware-Assisted Verification Portfolio

Siemens EDA Updates, Completes Its Hardware-Assisted Verification Portfolio
by Bernard Murphy on 04-14-2021 at 6:00 am

Siemens Hardware assisted Verification platform launch graphic 2 32521 min

Siemens EDA’s Veloce emulation products are long-established and worthy contenders in any emulation smack-down. But there was always a hole in the complete acceleration story. Where was the FPGA prototyper? Current practice requires emulation for fast simulation with hardware debug, plus prototyping for faster simulation… Read More


Emulation as a Service Benefits New AI Chip

Emulation as a Service Benefits New AI Chip
by Bernard Murphy on 09-10-2020 at 6:00 am

Emulation as a Service

It’s no secret that innovation in AI chip architectures is on a tear. When you put together the spatial complexity of highly parallelized algorithms with the need to localize memory accesses on-chip to the greatest extent possible, we’re seeing a proliferation of all kinds of domain-specific architectures. Which in the normal… Read More


Mentor at DVCON 2020!

Mentor at DVCON 2020!
by Daniel Nenni on 02-17-2020 at 6:00 am

DVCon 2020 SemiWiki

Are you ready for the premier conference for functional design and verification of electronic systems?

Sponsored by Accellera Systems Initiative, DVCon is an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP)… Read More


Mentor Showcases Digital Twin Demo

Mentor Showcases Digital Twin Demo
by Bernard Murphy on 03-06-2019 at 6:00 am

Mentor put on a very interesting tutorial at DVCon this year. Commonly DVCon tutorials center around a single tool; less commonly (in my recent experience) they will detail a solution flow but still within the confines of chip or chip + software design. It is rare indeed to see presentations on a full system design including realistic… Read More


MENTOR at DVCON 2019

MENTOR at DVCON 2019
by Daniel Nenni on 02-04-2019 at 7:00 am

The semiconductor conference season has started out strong and the premier verification gathering is coming up at the end of this month. SemiWiki bloggers, myself included, will be at the conference covering verification so you don’t have to. Verification is consuming more and more of the design cycle so I expect this event to … Read More


Mentor Plays for Keeps in Emulation

Mentor Plays for Keeps in Emulation
by Bernard Murphy on 02-17-2017 at 7:00 am

EDA has always been a fiercely competitive market, no more so than in emulation where the clash of claims and counter-claims can leave those of us on the sidelines wondering who’s really on top. Sales are the obvious indicator but leadership there flips back and forth between product releases. That makes Mentor’s choice to play … Read More


Who Left the Lights On?

Who Left the Lights On?
by Bernard Murphy on 01-03-2017 at 7:00 am

I attended a Mentor verification seminar earlier in the year at which Russ Klein presented a fascinating story about a real customer challenge in debugging a power problem in a design around an ARM cluster. Here’s the story in Russ’ own words. If you’re allergic to marketing stories, read it anyway. You might… Read More


Keeping It Fresh with the Veloce Deterministic ICE App

Keeping It Fresh with the Veloce Deterministic ICE App
by Rizwan Farooq on 11-02-2016 at 4:00 pm

In The Times They Are A Changin’ Nobel Laureate Bob Dylan advised us to “heed the call” of change or suffer the consequences. This couldn’t be more true, considering what design and verification engineers face every day in the midst of the technological revolution.

Change has never been so rapid. And it requires we constantly adapt.… Read More