Looking at the Press Release (PR) flow, it was interesting to see how TSMC has solved a communication dilemma. At first, let’s precise that #1 Silicon foundry has to work with each of the big three EDA companies. As a foundry, you don’t want to lose any customer, and then you support every major design flow. Choosing another strategy… Read More
Soft IP Quality Standards
As SoC design has transformed from being about writing RTL and more towards IP assembly, the issue of IP quality has become increasingly important. In 2011 TSMC and Atrenta launched the soft IP qualification program. Since then, 13 partners have joined the program.
IP quality is multi-faceted but at the most basic level, an IP block… Read More
TSMC OIP Ecosystem Forum 2012
The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC’s design ecosystem member companies together to share with our customers real-case solutions for customers’ design challenges and success stories of best practice in TSMC’s design ecosystem.
More than 90% of the attendees last year said “this… Read More
Exclusive Sneak Peek: Cadence at TSMC OIP Ecosystem Forum 2012
The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC’s design ecosystem member companies together to share with our customers real-case solutions for customers’ design challenges and success stories of best practice in TSMC’s design ecosystem. More than 90% of the attendees last year said “this… Read More
Will Paul Otellini Convince Tim Cook to Fill Intel’s Fabs?
An empty Fab is a terrible thing to waste, especially when it is leading edge. By the end of the year Intel will, by my back of the envelope calculation, be sitting with the equivalent of one idle 22nm Fab (cost $5B). What would you do if you were Paul Otellini?
Across the valley, in Cupertino, you have Tim Cook, whose modus operandi is … Read More
Mentor Graphics Update at TSMC 2012 OIP
What
In just 20 days you can get an update on four Mentor Graphics tools as used in the TSMC Open Innovation Platform (OIP). Many EDA and IP companies will be presenting along with Mentor, so it should be informative for fabless design companies in Silicon Valley doing business with TSMC.
… Read More
Taiwan Travel Explained!
Whenever people hear that I travel internationally one week a month they cringe at the thought of crowded airports, 12 hour flights, jet lag, and days packed with meetings. I generally shrug, accept the label of travel warrior, and say it is all part of doing business in the semiconductor ecosystem. But in reality, it is not as bad … Read More
Fabless Semiconductor Ecosystem Update 2012
Just a reminder, the semiconductor industry is doing quite well thanks to the fabless semiconductor ecosystem. TSMC, my economic bellwether, reported another great month with a 32% increase over August 2011 and a 16% increase over January-August 2011. TSMC is forecasting Q3 at a 7% increase over Q2, which was an amazing 21% increase… Read More
TSMC 28nm Update Q3 2012!
Reports out of Taiwan (I’m in Hsinchu this week) have TSMC more than doubling 28nm wafer output in Q3 2012 due to yield improvements and capacity increases while only spending $3.6B of the $8.5B forecasted CAPEX! Current estimates have TSMC 28nm capacity at 100,000 300mm wafers (+/- 10%) per month versus 25,000 wafers reported… Read More
TSMC Leads Semiconductor Sales Growth in 2012!
As a fitting postscript to my “Brief History of the Fabless Semiconductor Industry”, semiconductor research company IC Insights compiled a list of the top semiconductor companies for the first half of 2012. As the traditional IDMs go fabless and sink in the ratings, the foundries post record gains led by TSMC at 22%, GlobalFoundries… Read More