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IC design at 20nm with TSMC and Synopsys

IC design at 20nm with TSMC and Synopsys
by Daniel Payne on 05-02-2012 at 10:25 am

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While the debate rages on about 28nm yield at foundry juggernaut TSMC, on Monday I attended a webinar on 20nm IC design hosted by TSMC and Synopsys. Double Patterning Technology (DPT) becomes a requirement for several layers of your 20nm IC design which then impact many of your EDA tools and methodology.… Read More


Audio IP Subsystems Made Easy with a Complete, SoC-Ready Solution

Audio IP Subsystems Made Easy with a Complete, SoC-Ready Solution
by Eric Esteve on 04-22-2012 at 12:22 pm

After the launch of ARC based complete sound system IP by Synopsys last month, which could be the effective starting point for subsystem IP offering, providing the initiative will be successful (this was not really the case in the past, as we discussed it in our blog), the company proposes a webinar focusing on:

  • The growing complexity
Read More

Synopsys Users Group 2012 Keynote: Dr Chenming Hu and Transistors in the Third Dimension!

Synopsys Users Group 2012 Keynote: Dr Chenming Hu and Transistors in the Third Dimension!
by Daniel Nenni on 04-08-2012 at 7:00 pm

It was an honor to see DR. Chenming Huspeak and to learn more about FinFets, a technology he has championed since 1999. Chenming is considered an expert on the subject and is currently a TSMC Distinguished Professor of Microelectronics at University of California, Berkeley. Prior to that he was the Chief Technology Officer of TSMC.… Read More


Does Subsystem IP will finally find a market? ARC based sound subsystem IP is on track…

Does Subsystem IP will finally find a market? ARC based sound subsystem IP is on track…
by Eric Esteve on 04-05-2012 at 4:03 am

Will the launch of ARC based complete sound system IP by Synopsys ring the bell for the opening of a new IP market segment, the “Subsystem IP”? If you look at the IP market evolution, starting from standard cell libraries and memory compiler offering in the 1990’s, moving to commodity functions like UART or I2C in the late 1990’s to … Read More


ARM big.LITTLE Virtual Platforms

ARM big.LITTLE Virtual Platforms
by Paul McLellan on 04-03-2012 at 7:11 pm

You have probably heard something about ARM’s big.LITTLE architecture. This links a Cortex-A15 multi-core CPU with a Cortex-A7 CPU. The A15 is a high-performance processor and the A7 is a very low power processor. The basic idea is that when high-performance is required (playing a graphical video game on your smartphone,… Read More


Synopsys Users Group Silicon Valley 2012 Keynote: ARM

Synopsys Users Group Silicon Valley 2012 Keynote: ARM
by Daniel Nenni on 03-28-2012 at 12:49 pm


Keynote #2 at SNUG 2012 was John Cornish, VP Marketing at ARM. Why they sent a marketing person to speak in front of 2,000+ engineers I do not know. To top that, next time they should send a sales person and do a real dog and pony show. To find out more about John I checked his LinkedIn profile which was bare. So enough about John, lets hit … Read More


Synopsys Users Group Silicon Valley 2012 Keynote: Aart de Geus

Synopsys Users Group Silicon Valley 2012 Keynote: Aart de Geus
by Daniel Nenni on 03-27-2012 at 1:26 pm

SNUG Chairman John Busco opened the session with a few words about Aart de Geus, the silver anniversary of Synopsys, and some SNUG statistics. A whopping 2,500 people registered this year! Probably due to the Magma acquisition which is prominently displayed on “Welcome Magma Users” signs and on the flat screens which are everywhere.… Read More


Synopsys Validates EDA360?

Synopsys Validates EDA360?
by Daniel Nenni on 03-26-2012 at 4:26 pm

Before I get too snarky here, I would like to thank Synopsys for the invitation to SNUG 2012 and including me with the professional editors at a 75 minute roundtable discussion with Synopsys CEO Aart de Geus. While Aart is not my favorite big EDA CEO (Wally Rhines of Mentor bought me lunch and returns my email), he is definitely the most… Read More


Synopsys: now in 3D

Synopsys: now in 3D
by Paul McLellan on 03-26-2012 at 8:00 am

And no red and green glasses required.

I remember the first time I heard about a Through Silicon Via (TSV), punching a hole through the entire wafer to make an electrical connection at the back, like we do all the time in printed circuit boards with through plated holes. I thought someone was trying one on and trying to make me look a fool.… Read More


NVM Express: pervasion of PCI Express in SSD based storage

NVM Express: pervasion of PCI Express in SSD based storage
by Eric Esteve on 03-22-2012 at 12:48 pm

The verification IP (VIP) for Non-Volatile Memory Express (NVMe) announcement from Synopsys is the first fruit issued from the acquisition of ExpertIO. With the proliferation of Nand Flash based storage equipment, or Solid State Drives (SSD), the move from pure SATA based solution was to be expected, sooner or later. Not because… Read More