Last week Samsung hosted the GSA Silicon Valley “State of the Industry” Meet-up which was well attended by the semiconductor elite, myself included. The agenda started with an update on the semiconductor industry outlook followed by deep dives into Automotive, IoT, Artificial Intelligence, and Cybersecurity all of which are… Read More
Semiconductor Intellectual Property
Power and Performance Optimization for Embedded FPGA’s
Last month, I made a “no-brainer” forecast that 2017 would be the year in which embedded FPGA (eFPGA) IP would emerge as a key differentiator for new SoC designs (link to the earlier article here).
The fusion of several technical and market factors are motivating design teams to incorporate programmable logic functionality… Read More
Four Barriers to Using an SoC for IoT Projects
I often read about the large number of expected IoT design starts around the world, so I started to think about what the barriers are for launching this industry in order to meet the projections. One of my favorite IoT devices is the Garmin Edge 820, a computer for cyclists that has sensors for speed, cadence, power, heart rate, altitude… Read More
Notes from the Neural Edge
Cadence recently hosted a summit on embedded neural nets, the second in a series for them. This isn’t a Cadence pitch but it is noteworthy that Cadence is leading a discussion on a topic which is arguably the hottest in tech today, with this range and expertise of speakers (Stanford, Berkeley, ex-Baidu, Deepscale, Cadence… Read More
An Easy Path to Bluetooth 5-enabled SoC Design
Bluetooth (BT) was never a bit-player in communication but what surprised me is that is already dominating the market, at least as measured by radios sold, and is likely to extend that lead over the next 5 years. Particularly impressive is that BT already leads cellular and WiFi. This strength is certainly influenced by sales into… Read More
Timing Closure Complexity Mounts at FinFET Nodes
Timing closure is the perennial issue in digital IC design. While the specific problem that has needed to be solved to achieve timing closure over the decades has continuously changed, it has always been a looming problem. And the timing closure problem has gotten more severe with 16/14nm FinFET SoCs due to greater distances between… Read More
AAPl Vs QCOM Who wins?
Things just got interesting in the iPhone supply chain with the $1B AAPL Vs QCOM legal action filed this week. For the life of me I could not understand why Apple second sourced the normally QCOM modem in the iPhone 7. It caused quite a stir in the technical community but we could only surmise that it was a price issue on the business side.… Read More
Qorvo and KeySight to Present on Managing Collaboration for Multi-site, Multi-vendor RF Design
Over the last several weeks I’ve been having a lot of discussions with colleagues around IP reuse and design data management. This led me to a discussion with Ranjit Adhikary, Marketing Vice President for ClioSoft.
ClioSoft is best known for their design collaboration software platform called SOS. They also sell an enterprise… Read More
DARPA Flex Logix and TSMC!
When I first saw emerging semiconductor IP company Flex Logix actively involved with TSMC I knew something big was coming and boy was I right. DARPA announced today that an agreement is in place with Flex Logix to develop EFLX eFPGA technology on TSMC 16FFC for use by companies or Government agencies designing chips for the US Government.… Read More
Technology Update With Andrew Faulkner and Jim Lipman of Sidense
Sidense is an interesting company in a very important market segment. Sidense was founded in 2004 and their 1T-OTP memory macros are now used in hundreds of chips from 180nm to 16nm for code storage, secure encryption keys, analog and sensor trimming and calibration, ID tags, and chip and processor configuration.
If you are designing… Read More
Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet