Arteris, a leading provider of system IP, will exhibit at DAC 2024, June 23-27, booth #1506. The company will demonstrate its latest technology including network-on-chip interconnect IP and SoC integration automation solutions. The products highlighted include CSRCompiler, Ncore Cache Coherent NoC IP and FlexNoC 5 interconnect… Read More
Arteris is Solving SoC Integration Challenges
The difficulty of SoC integration is clearly getting more demanding. Driven by process node density, multi-chip integration and seemingly never-ending demands for more performance at lower power, the hurdles continue to increase. When you consider these challenges in the context of Arteris, it’s natural to think about hardware… Read More
Arteris Frames Network-On-Chip Topologies in the Car
On the heels of Arm’s 2024 automotive update, Arteris and Arm announced an update to their partnership. This has been extended to cover the latest AMBA5 protocol for coherent operation (CHI-E) in addition to already supported options such as CHI-B, ACE and others. There are a couple of noteworthy points here. First, Arm’s new Automotive… Read More
Podcast EP213: The Impact of Arteris on Automotive and Beyond with Frank Schirrmeister
Dan is joined by Frank Schirrmeister, vice president of solutions and business development at Arteris. He leads activities in the industry verticals including automotive and technology horizontals like artificial intelligence, machine learning, and safety. Before Arteris, Frank held senior leadership positions at Cadence… Read More
Arteris is Unleashing Innovation by Breaking Down the Memory Wall
There is a lot of discussion about removing barriers to innovation these days. Semiconductor systems are at the heart of unlocking many forms of technical innovation, if only we could address issues such as the slowing of Moore’s Law, reduction of power consumption, enhancement of security and reliability and so on. But there … Read More
Moderating Our Open Chiplet Enthusiasm. A NoC Perspective
I recently talked with Frank Schirrmeister (Solutions & Business Development, Arteris) on the state of progress to the open chiplet ideal. You know – where a multi-die system in package can be assembled with UCIe (or other) connections seamlessly connecting data flows between dies. If artificial general intelligence and… Read More
Podcast EP204: A Broad View of Design Architectures and the Role of the NoC with Arteris’ Michal Siwinski
Dan is joined by Michal Siwinski, Chief Marketing Officer at Arteris. He brings more than two decades of technology-based strategy, marketing and growth acceleration. Prior to joining Arteris, he served as Corporate Vice President of Marketing and Business Development at Cadence, and through his leadership, the company’s… Read More
RISC-V and Chiplets: A Panel Discussion
At the recent RISC-V Summit, the very last session was a panel about chiplets called Chiplets in the RISC-V Ecosystem. It was moderated by Calista Redmond, the CEO of RISC-V International. The panelists were:
- Laurent Moll, COO of Arteris
- Aniket Saha, VP of Product Management of Tenstorrent
- Dale Greenley, VP of Engineering of Ventana
When Will Structured Assembly Cross the Chasm?
First, a quick definition. By “structured assembly,” I mean the collection of tools to support IP packaging with standardized interfaces, SoC integration based on those IPs together with bus fabric and other connectivity hookups, register definition and management in support of hardware/software interface definition, … Read More
NoCs give architects flexibility in system-in RISC-V design
RISC-V tends to generate excitement over the possibilities for the processor core, any custom instruction extensions, and its attached memory subsystem. Those are all necessary steps to obtaining system-level performance. But is that attention sufficient? Architects who have ventured into larger system-on-chip (SoC) … Read More