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At What Point Does Transistor Gate Length Stop Getting Smaller?

At What Point Does Transistor Gate Length Stop Getting Smaller?
by Daniel Payne on 08-03-2016 at 12:00 pm

When I started doing IC design back in 1978 we had 6,000 nm channel gate lengths, and today you can buy a smart phone with 16 nm or 14 nm technology, although the gate lengths in those phones are more like 34 nm. The International Technology Roadmap for Semiconductors (ITRS) makes predictions about emerging trends in our industry and… Read More


Circuit Simulation Panel Discussion at #53DAC

Circuit Simulation Panel Discussion at #53DAC
by Daniel Payne on 06-29-2016 at 12:00 pm

Four panelists from big-name semiconductor design companies spoke about their circuit simulation experiences at #53DAC in Austin this year, so I attended to learn more about SPICE and Fast SPICE circuit simulation. I heard from the following four companies:… Read More


Xilinx is Killing Altera!

Xilinx is Killing Altera!
by Daniel Nenni on 06-28-2016 at 4:00 pm

At a recent outing with FPGA friends from days gone by, the long running Xilinx vs Altera debate has come to an end. The bottom line is that Xilinx has used the FUD (fear, uncertainty, and doubt) of the Intel acquisition quite effectively against Altera and is racking up 20nm and 16nm design wins at an alarming rate. It will be a while … Read More


IC Designers talk about 28nm to 7nm challenges at #53DAC

IC Designers talk about 28nm to 7nm challenges at #53DAC
by Daniel Payne on 06-20-2016 at 12:00 pm

IC design challenges are different at advanced nodes like 7nm, so to learn more about the topic I attended a panel luncheon at DAC sponsored by Cadence. The moderator was both funny and technically astute, quite the rare combination, so kudos to Professor Rob Rutenbar, a former Neolinear guy now at the University of Illinois. Panelists… Read More


NVIDIA GeForce GTX 1080 Poised To Claim The Gaming And VR Performance Crown

NVIDIA GeForce GTX 1080 Poised To Claim The Gaming And VR Performance Crown
by Patrick Moorhead on 06-08-2016 at 12:00 pm

NVIDIA has been teasing the promise of Pascal for years, but this year Pascal’s performance became much more real. With the announcement of the Tesla P100 based on Pascal, NVIDIA was able to show the neural-network world what Pascal was really capable of. However, that chip is very different from the gaming-focused Pascal chip … Read More


IMEC Technology Forum (ITF) – Secrets of Semiconductor Scaling

IMEC Technology Forum (ITF) – Secrets of Semiconductor Scaling
by Scotten Jones on 06-07-2016 at 4:00 pm

IMEC is a technology research center located in Belgium that is one of the premier semiconductor research centers in the world today. The IMEC Technology Forum (ITF) is a two-day event attended by approximately 1,000 people to showcase the work done by IMEC and their partners.… Read More


IMEC Technology Forum (ITF) – Moving the Electronics Industry Forward

IMEC Technology Forum (ITF) – Moving the Electronics Industry Forward
by Scotten Jones on 06-02-2016 at 4:00 pm

IMEC is a technology research center located in Belgium that is one of the premier semiconductor research centers in the world today. The IMEC Technology Forum (ITF) is a two-day event attended by approximately 1,000 people to showcase the work done by IMEC and their partners.

Gary Patton is the Chief Technical Officer and Senior… Read More


TSMC Update at #53DAC!

TSMC Update at #53DAC!
by Daniel Nenni on 05-31-2016 at 4:00 pm

TSMC is having an interesting year for sure. I was at the TSMC Symposium in Hsinchu last week and everyone was talking about the new 16FFC process. Silicon is out and it is exceeding expectations leading some people (me included) to believe that TSMC 16FFC will be the next TSMC 28nm in regards to popularity. To be clear, 16FFC is currently… Read More


How TSMC Tackles Variation at Advanced Nodes

How TSMC Tackles Variation at Advanced Nodes
by Pawan Fangaria on 05-27-2016 at 12:00 pm

The design community is always hungry for high-performance, low-power, and low-cost devices. There is emergence of FinFET and FDSOI technologies at ultra-low process nodes to provide high-performance and low-power requirements at lower die-size. However, these advanced process nodes are prone to new sources of variation.… Read More