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WP_Term Object
(
[term_id] => 157
[name] => EDA
[slug] => eda
[term_group] => 0
[term_taxonomy_id] => 157
[taxonomy] => category
[description] => Electronic Design Automation
[parent] => 0
[count] => 4382
[filter] => raw
[cat_ID] => 157
[category_count] => 4382
[category_description] => Electronic Design Automation
[cat_name] => EDA
[category_nicename] => eda
[category_parent] => 0
[is_post] =>
)
Dan is joined by Simon Butler, the founder and CEO of Methodics Inc, Methodics was acquired by Perforce in 2020, and he is currently the general manager of the Methodics business unit at Perforce. Methodics created IPLM as a new business segment in the enterprise software space to service the needs of IP and component based design.… Read More
Automotive engineers are familiar with the ISO 26262 standard, as it defines a process for developing functional safety in electronic systems, where human safety is preserved as all of the electronic components are operating correctly and reliably. Automotive electronics have now grown to cover dozens of applications, and… Read More
SemiWiki readers from a digital IC background might find it surprising that post-PCB route analysis for high speed serial links isn’t a routine and fully automated part of the board design process. For us, the difference between pre- and post-route verification is running a slightly more accurate extraction and adding SI modelling,… Read More
“We intend to grow revenue 14% to 15%, continue to drive notable ops margin expansion and aim for approximately 16% non-GAAP earnings per share growth.”
Synopsys, Inc. (NASDAQ:SNPS) Q4 2022 Earnings Call Transcript
Synopsys is the EDA bellwether since they report early and are the #1 EDA and #1 IP company. In addition to crossing… Read More
Resistance checks between ESD diode cells and pads or power clamps, and current density analysis for such current flows are commonly used for ESD networks verification [1]. When such simulations use standard post-layout netlists generated by parasitic extraction tools, the calculated resistances may be dramatically higher… Read More
“The amateurs discuss tactics: the professionals discuss logistics.”
— Napoleon
Logistics is even more important today than it was in the early 1800’s. Further, the effectiveness of Defense systems is increasingly driven by sophisticated electronics. As the recent Ukraine conflict reveals, weapons such as precision munitions,… Read More
Register management tools have been used mostly in a bottom-up approach. There are some documents and/or spreadsheets created by the System Architects that are delivered to the design and verification teams. They then start capturing the HW/SW interface of the peripheral IPs in their in-house or commercial register management… Read More
No doubt that the design success of nowadays system on chips (SoCs) is directly linked to the success of cost control. More market opportunities are open for less expensive system on chips and electronic systems.
Both the design cost prediction and the resource tracking during the design process, are key to such a success
Predicting… Read More
Ansys is hosting IDEAS Digital Forum 2022, a no-cost virtual event that brings together industry executives and technical design experts to discuss the latest in EDA for Semiconductors, Electronics, and Photonics.
See the full online conference agenda and list of speakers at www.ansys.com/IDEAS. The free registration will… Read More
The Role of Clock Gatingby Steve Hoover on 11-28-2022 at 10:00 amCategories: EDA
Perhaps you’ve heard the term “clock gating” and you’re wondering how it works, or maybe you know what clock gating is and you’re wondering how to best implement it. Either way, this post is for you.
Why Power Matters
I can’t help but laugh when I watch a movie where the main characters are shrunk… Read More
AI Bubble?