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Electronic Design Automation
The development of the Unified Power Format (UPF) was spurred on by the need for explicit ways to enable specification and verification of power management aspects of SoC designs. The origins of UPF date back to its first release in 2007. Prior to that several vendors had their own methods of specifying power management aspects … Read More
We all know that designers work hard to reach design closure on SOC designs. However, what gets less attention from consumers is the effort that goes into ensuring that these chips will be fully operational and meeting timing specs over their projected lifetime. Of course, this is less important for chips used in devices with projected… Read More
Advanced semiconductor nanometer technology nodes, together with smart IC design applications enable today very complex and powerful systems for communication, automotive, data transmission, AI, IoT, medical, industry, energy harvesting, and many more.
However, more aggressive time-to-market and higher performance… Read More
With ever challenging time to market requirements, co-developing IP and firmware is imperative for all system development projects. But that doesn’t make the task any easier. Depending on the complexity of the system being developed, the task gets tougher. For example, different pieces of IP may be the output of various teams… Read More
The electromagnetism problems upon which we spent many hours laboring away on homework in college has a mathematical formulation originally developed by Maxwell, Lorentz, Gauss, Faraday and others. In their full forms, these formulas are partial differential equations that come in many versions – both differential and integral.… Read More
In our previous blog installments, we examined the ingredient for modeling the potential for interference between a 5G C-band base station and an aviation radar altimeter. Using candidate emissions models for the transmitter, wideband susceptibility models for a candidate radar altimeter receiver and antenna and propagation… Read More
Typically, there is an existential rift between the on-chip access requirements for test and the need for security in SoCs. Using traditional deterministic scan techniques has meant opening up full read and write access to the flops in a design through the scan chains. Having this kind of access easily defeats the best designed… Read More
In our previous blog installment, we introduced the components of RF interference modeling, and established models for wideband peak emissions of a 5G C-band transmitter and the wideband receiver susceptibility for a radar altimeter receiver. Here, we consider the third component: the wireless channel, which considers the… Read More
Harry Foster opened and wrapped a tutorial at DVCon 2022 on “The Best Verification Strategy You’ve Never Heard Of”. Harry started with a common refrain on verification; we face a crisis thanks to a combination of growing complexity in the systems we are able to design, yet double exponential growth in verification cost for… Read More
In our first blog installment, we outlined the interference concerns surrounding the coexistence of the new C-band 5G telecom service spanning the band from 3.7 to 3.98 GHz with aviation radar altimeters. Radar altimeters are essential components for safety during landing and takeoff, as they offer precise measurements from… Read More
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