Lorentz Solution presented at TSMC’s DAC 2012 Open Innovation Platform Theater. The presenter was Lorentz Sales Director, Tom Simon. He presented what Lorentz calls its Electromagnetic Design and Analysis Platform. One of the main points of the talk was the cooperative work that Lorentz does with TSMC.
Electronic Design Automation
Robustness, Reliability and Yield at DAC
On Wednesday at DAC I met with Bob Slee, distributor and Michael Siu, AE for MunEDA to get an update on what’s new. MunEDA has EDA software for:
- Schematic porting
- Nominal circuit analysis
- Nominal circuit optimization
- Statistical circuit analysis
- Statistical circuit optimization
- IP porting
- Circuit model generation
Methodics update at DAC
Fergus Slorach, CTO and Founder of Methodics met with me at DAC on Wednesday afternoon to provide an update on software configuration management for hardware designers.… Read More
Photo and Video Overview of DAC 2012
Sunday Night – you have to network at the EDAC kick-off party.… Read More
Analog FastSPICE update at DAC
Paul Estrada, COO of Berkeley DA met with me on the final day of DAC to provide an update. BDA coined the phrase Analog FastSPICE and have continued to dominate that market segment in the world of SPICE circuit simulators.… Read More
AMS Simulation Update from Mentor Graphics at DAC
I met with Jay Madiraju of Mentor Graphics on Wednesday at DAC to get an update on their AMS simulation products. We worked together at Mentor back when Mach TA was being developed as a Fast SPICE circuit simulator.… Read More
FinFET Standard Cells at DAC
Rajiv Bhateja, Dhrumil Gandhi and Neal Carney met with me at DAC on Wednesday to give an update on what’s new in 2012 for Tela Innovations, a provider of lithography optimized IP and tools. This team has a rich history in EDA and IP from companies like: ARM, Artisan, Mentor Graphics and Silicon Compilers.… Read More
TSMC Theater Presentation: Apache
At the TSMC Theater Apache (don’t forget, now a subsidary of Ansys) talked about Emerging Challenges for Power, Signal and Reliability Verification on 3D-IC and Silicon Interposer Designs. The more I see about the costs and challenges of 20/22nm and below, the more I think that these 3D and 2.5D approaches are going to be … Read More
DesignSync update from Dassault Systems at DAC
At DAC on Wednesday Rick Stanton of Dassault Systems gave me an update on what’s new with DesignSync, a design data management tool offered since 1998. Rick and I both worked at Viewlogic in the 90’s along with Dennis Harmon who then founded Synchronicity, later acquired by Dassault Systems.… Read More
Finding RTL Bugs Live Using Formal Techniques
Most of what you see at DAC is canned PowerPoint presentations, however on Tuesday afternoon I spotted a company called Oski Technology that was doing something almost unheard of – they had an engineer debugging a digital design from Nvidia using formal tools live. I later found out the engineer found 4 bugs in just three days… Read More
Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI