I’ve used Aldec tools like their Verilog simulator (Riviera PRO) when teaching a class to engineers at Lattice Semi, so to get an update about the company I spoke with Dave Rinehart recently by phone. A big product announcement by Aldec today is for their ASIC prototyping system with a capacity range of 4 Million to 96 Million… Read More
Electronic Design Automation
Chip-Package-System Webinar
Aveek Sarkar presented a webinar on chip-package-system (CPS) earlier this summer. One of the big challenges with low-power electronic systems is that the performance, power and price goals are mutually conflicting. It’s like the old joke about “pick any 2”. But for a real system all need to be optimized. … Read More
Cadence September News: strong IP and VIP focus
There are three articles on the front page, in the September release of Cadence newsletter, all of them are dedicated to either IP (DDR4), VIP (NVM express VIP being used at Samsung) or Martin Lund. You can read Martin’s interview here and/or take a look at what I write about him this summer. This strong focus on IP, and in fact on Interface… Read More
Samsung Invests in Carbon
I’ve talked before about how venture capitalists will no longer invest in EDA companies since the prospect for a huge return just isn’t there any more. By big return I mean an acquisition at hundreds of millions of dollars, like SPC, CCR, Ambit, Cadmos, Simplex. But we all know that chips cannot be designed without software… Read More
Is DDR4 a bridge too far?
We’ve gone through two decades where the PC market made the rules for technology. The industry faces a question now: Can a new technology go mainstream without the PC?
By now, you’ve certainly read the news from Cadence on their DDR4 IP for TSMC 28nm. They are claiming a PHY implementation that exceeds the data rates specified for … Read More
Hogan University: Second Semester
The next event in the Jim Hogan Emerging Companies series (organized by the EDAC Emerging Companies Committee) will be on 17th October at Cadence (I’m guessing in building 5 but I’m sure there will be signs). The specific topic this time will be How to Raise Money and How Not to Spend it. The evening will focus on different… Read More
17th Si2 Conference – October 9 – Santa Clara, CA
This conference will begin with a keynote address by my good friend Jim Hogan, EDA industry pioneer and venture capitalist. Jim has worked in the semiconductor design and manufacturing industry for more than 35 years and is very candid about his experience and vision for the future of EDA. This keynote and Q&A alone is worth … Read More
Verifying Finite State Machines
Finite state machines (FSMs) are a very convenient way of describing certain kinds of behavior. But like any other aspect of design, it is important to get everything right. Since finite state machines have been formally studied, there is a lot of knowledge about the types of bugs that a finite state machine might exhibit.
When flipflops… Read More
Built to last: LTSI, Yocto, and embedded Linux
The open source types say it all the time: open is better when it comes to operating systems. If you’re building something like a server or a phone, with either a flexible configuration or a limited lifetime, an open source operating system like Linux can put a project way ahead.
Linux has always started with a kernel distribution,… Read More
Custom IC and AMS Tool Flow with Synopsys
The big three EDA companies all have Custom IC and AMS tool flows as shown in the following comparison table:… Read More
Musk’s new job as Samsung Fab Manager – Can he disrupt chip making? Intel outside