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EDA

Electronic Design Automation

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MEMS in The World of ICs – How to Quickly Verify?

MEMS in The World of ICs – How to Quickly Verify?
by Pawan Fangaria on 10-29-2013 at 10:00 am
Categories: Coventor, EDA

In the modern electronic world, it’s difficult to imagine any system working as a whole without MEMS (Micro-electromechanical Systems) such as pressure sensors, accelerometers, gyroscopes, microphones etc. working in sync with other ICs. Specifically in AMS (Analog Mixed-Signal) semiconductor designs, there can be significant… Read More

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TSMC ♥ Mentor (Calibre PERC)

TSMC ♥ Mentor (Calibre PERC)
by Daniel Nenni on 10-29-2013 at 8:00 am
Categories: EDA

As semiconductors become more integrated into our lives reliability is becoming a critical issue. As IP consumes more of our die, IP reliability is becoming a critical issue. As we pack more transistors into a chip, reliability is becoming a critical issue. As we move from 28nm to 20nm to 16nm, reliability is becoming a critical … Read More

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Diagnosing Double Patterning Violations

Diagnosing Double Patterning Violations
by Beth Martin on 10-28-2013 at 5:16 pm
Categories: EDA, Siemens EDA

I’ll bet you’ve read a bunch of stuff about double patterning, and you’re probably hoping that the design tools will make all your double patterning issues just go away. Well, the truth is that the foundries and EDA vendors have worked really hard to make that true.

However, for some critical portions of your design, there … Read More

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Getting the Most Out of the ARM CoreLink™ NIC-400

Getting the Most Out of the ARM CoreLink™ NIC-400
by Daniel Payne on 10-28-2013 at 12:27 pm
Categories: EDA

SoC designers are attracted to ARM as an IP provider because of their popular offerings and growing ecosystem of EDA partners like Carbon Design Systems. At the upcoming ARM Techcon on October 31 this week in Santa Clara you’ll have an opportunity to hear a joint presentation from ARM and Carbon Design Systems on: Getting … Read More

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Cadence’s Mixed-Signal Technology Summit

Cadence’s Mixed-Signal Technology Summit
by Randy Smith on 10-28-2013 at 1:45 am
Categories: Cadence, EDA

On October 10, I attended another Cadence Summit, this one titled the Cadence Mixed-Signal Technology Summit. Recently, I had written about the Cadence Silicon Verification Summit. The verification event was the first of its kind, and I thought it had terrific content. Being more of a digital guy myself, I was unaware that Cadence… Read More

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An easier way to deal with design rule waivers (video)

An easier way to deal with design rule waivers (video)
by Beth Martin on 10-26-2013 at 11:00 am
Categories: EDA, Siemens EDA

At advanced nodes, design rules are necessarily more complex and restrictive. Although most of the time you can find a way to live with them, sometimes it’s necessary to seek a waiver from the foundry for a particular design feature. This involves documenting the feature, the design rules in question and the conditions under which… Read More

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An Affair to Remember: EDA’s 50th Anniversary

An Affair to Remember: EDA’s 50th Anniversary
by Daniel Nenni on 10-26-2013 at 11:00 am
Categories: EDA, Events

What an amazing night! I celebrated the 50[SUP]th[/SUP] anniversary of the industry I grew up in! With my beautiful wife at my side and a table full of friends we all went down memory lane, ate, drank, and then enjoyed the auction.

The tour of the new computer museum was amazing. I was learning so much up until the 1970’s, then … Read More

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TSMC ♥ Synopsys (HSPICE)

TSMC ♥ Synopsys (HSPICE)
by Daniel Nenni on 10-24-2013 at 5:05 am
Categories: EDA, Synopsys

In case you haven’t noticed, Synopsys has been in the press lately talking about their relationship with TSMC. Since I’m an internationally recognized industry expert they gave me a call for a briefing and I was happy to do it. Staying connected with the #1 EDA company is important and fun since I get to ask questions that most people… Read More

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Webinar on IP Lifecycle Management

Webinar on IP Lifecycle Management
by Daniel Payne on 10-23-2013 at 5:44 pm
Categories: EDA, Perforce

EDA and Semiconductor companies are offering new webinars almost every week of the year, so there’s always something worth learning about that only takes an hour of time. On November 5th there’s an interesting webinar planned on the topic of IP Lifecycle Management, hosted by Methodics. I blogged two weeks ago about,… Read More

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Kathryn: "Formal Will Dominate Verification"

Kathryn: "Formal Will Dominate Verification"
by Paul McLellan on 10-23-2013 at 4:16 pm
Categories: EDA

At the Jasper Users’ Group meeting, Kathryn presented the state of Jasper. The numbers are impressive. The company has grown at a CAGR of over 35% since 2007, which is 6 times faster than EDA as a whole. They have been profitable at 15-20% EBITDA for 14 consecutive quarters.

Jasper is focused on engaging deeply with a small number… Read More