You might ask yourself “Why would anyone want to have a public synchronizer available to download?” Usually designers just grab a flip-flop from his or her company’s or a standard cell vendor’s library. However, are these handy solutions the best course of action today? Current SoC designs have numerous clock domains providing… Read More
Electronic Design Automation
Integrated Spec Design & Documentation for SoC
One challenge in SoC projects is maintaining consistency between the specification, design and documentation throughout the product lifecycle. Imagine the chaos if your specification for power is 300 mW, the design is actually 350 mW and the documentation promises 250 mW. Traditionally the design and documentation process… Read More
Why Would You Leave Yahoo to Go Into EDA?
I sat down this afternoon with Peter Theunis, the CTO of Methodics. Conveniently their office is about a 15 minute walk from where I live so we could chat face to face.
Peter started programming when he was 8 and his first “product” was a weather system for orchards where sensors in the orchards would send information … Read More
Cadence 2014 Results
Cadence announced their Q4 and 2014 results yesterday. They are the only one of the big 3 EDA companies whose fiscal year is the calendar year so Synopsys and Mentor will not be joining them in announcing them this week.
I won’t go into the numbers in detail, you can find them all easily enough. But it is a pity that statements like… Read More
Concept: From Schematics to Debug
In the late 1990s I was the VP Engineering at Ambit Design Systems. We had a synthesis product (called BuildGates, nobody ever forgot the name). Both our own engineers and our customers wanted to be able to take a look at the gate-level netlist that was generated from their RTL. We used a product from a company called Concept Engineering… Read More
What’s Hot at SPIE Advanced Lithography
The 40[SUP]th[/SUP] SPIE Advanced Lithography conference will be at the San Jose Convention Center 22-26 February. Over the past few years, this conference has grown in scope to include emerging patterning technologies, like directed self-assembly (DSA) and design-process-technology co-optimization.
Underlying all … Read More
Temperature Monitoring IP to Revamp SoCs
With increasing density and functionality of chips at extremely thin silicon and metal layers, temperature has become critical. The temperature situation can become worse with wireless enabled 24/7 power-on devices. In such a scenario, a device must manage its thermal profile dynamically to keep the temperature within tolerable… Read More
Webinar: Electronics in Space or Avionics
I talked to Derek Kimpton of Silvaco today. He turns out to be a fellow Brit. He is presenting a webinar on total dose that is of interest to anyone creating chips that will go into space (primarily satellites), or near space (primarily avionics in planes). Pretty much everyone knows at least the basics of single-event-effects (SEE)… Read More
Inside tips on Tanner L-Edit toolbox
Advanced skill in auto repair, carpentry, plumbing, and similar trades often correlates to one factor. Knowing what you want to do is one thing – having the proper tool is another, and can make the difference. Many a job has extended from minutes to hours over the lack of the right tool at the right moment. Experienced mechanics and… Read More
What’s New with Static Timing Analysis
When I hear the phrase Static Timing Analysis (STA) the first EDA tool that comes to mind is PrimeTimefrom Synopsys, and this type of tool is essential to reaching timing closure for digital designs by identifying paths that are limiting chip performance. Sunil Walia, PrimeTime ADV marketing lead spoke with me by phone on Thursday… Read More
cHBM for AI: Capabilities, Challenges, and Opportunities