Mentor’s annual user group meeting at the Doubletree Hotel in San Jose, CA is coming up on Tuesday, April 21[SUP]st[/SUP]. This complementary event provides a unique opportunity to share design techniques and exchange ideas with other users and experts in the design community. As you may have read I am the star of the show; moderating… Read More
Electronic Design Automation
Beyond CMOS: Three Industry Teams Aim at Next Generation of High-performance Computing
Given the current limitations with CMOS designs, such as low temperature thresholds and efficiency in power consumption, there is a vast need to expand into superconducting computers in order to manage consumers’ need for power and performance. Although supercomputers require extremely low temperatures, they are capable… Read More
Safety Dominates Agenda in DAC’s Automotive Track
The connected car movement is in full bloom, making headlines in the trade media on how the cutting-edge electronics will transform the twenty-first century driving experience. However, a closer look at the Internet of cars juggernaut shows that safety and security of the networked vehicle are still a major stumbling block.… Read More
Sidense NVM Scores Qualification on GLOBALFOUNDRIES 28nm SLP and HPP
A tremendous number of chips being designed for today’s products require some sort of onboard data storage. The size of these needs range from a handful of bytes, for trim and calibration storage, to something much more substantial like boot code storage. In both of these examples the storage ideally should be nonvolatile, with… Read More
Cu-Pillar in Advanced Logic Devices
In 2001, flipchip with solder bump was already a dominant technology and it was replacing wire bonding as the main interconnection choice for a growing number of devices. It was offering fine pitch interconnections for increased I/O counts. In the solder bump process, a bump is formed on the chip and on the package substrate and … Read More
ANSYS Enters the League of 10nm Designs with TSMC
The way we are seeing technology progression these days is unprecedented. It’s just about six months ago, I had written about the intense collaboration between ANSYSand TSMCon the 16nm FinFET based design flow and TSMC certifying ANSYS tools for TSMC 16nm FF+ technology and also conferring ANSYS with “Partner of the Year” award.… Read More
Starvision Pro: Lattice Semiconductor’s Experience
During SNUG I took the opportunity to chat to Choon-Hoe Yeoh of Lattice Semiconductor about how they use Concept Engineering’s Starvision Pro product. He is the senior director of EDA tools and methodologies there.
Lattice Semiconductor is a manufacturer of low-power, small-footprint, low-cost programmable logic devices.… Read More
Archives from TI’s Baseband Glory – Part 1
In 1992, nearly two years after Britain’s Acorn Computers joined hands with Apple and VLSI to create Advanced RISC Machines or ARM, the semiconductor upstart landed its first major licensing breakthrough. In retrospect, while Apple’s Newton handheld computer had played a key role in creating the ARM venture, Texas… Read More
FinFET vs FDSOI – Which is the Right One for Your Design?
As a professional conference goer I can see definite trends when it comes to topics and attendance. Thus far this year I have seen a double digit increase in attendance, which is great. The question is why? Why is the fabless semiconductor ecosystem leaving the safety of their cubicles and computer screens in droves to mingle amongst… Read More
US is the Ultimate Leader in Semiconductor Business
Last year in November when I looked at the world’s top20 semiconductor companies with Samsungand TSMCbeing at the second and third rank respectively, first being Intel, I computed the sales numbers of the companies based on their countries and found that Taiwan and South Korea accounted for 34.5% of the total sales of the top20 … Read More
Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet