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I think that the answer is pretty obvious, but the interesting point is to figure out which processor type, and which part of revenues, up-front license or royalties? One of my customers, let’s call him Mr. X, ask me to clarify this point. Mr. X has bought the excellent report from Gartner “Market Share: Semiconductor Design Intellectual… Read More
The emerging market for IoT and wearable devices are designed with mixed-signal IP that includes: embedded CPU, flash, analogue and radio.EDA and IP companies have recently worked together to allow us to design an MCU with mixed-signal IP blocks more efficiently. This morning I attended a webinar with presenters from ARMand … Read More
There is clearly a lot of hype about the Internet of Things (IoT) right now, but also it is clear that it will be a real market. In fact, it already is with various medical, fitness and home-appliance products already available. At CES in January, wearables was probably the biggest trend. That doesn’t always pan out (3D TV was… Read More
Cadence continues on its quest to be a top semiconductor IP supplier which is a good thing since the semiconductor world now revolves around IP. Cadence CEO Lip-Bu Tan mentioned IP 14 times during his keynote and he was followed by the president of Imagination Technologies and the CEO of recently acquired Tensilica. I was not afforded… Read More
The biggest market for semiconductors is mobile and an ARM processor is the center of the axle around which it revolves. So everyone in the mobile ecosystem needs to work closely with ARM. At CDNLive earlier this week Cadence and ARM announced that they are deepening their partnership. Most of what they announced makes it a lot easier… Read More
In the current semiconductor design landscape, the design size and complexity of SoCs has grown to large extent with stable tools and technologies that can take care of integrating several IPs together. With that mammoth growth in designs, verification flows are evolving continuously to tackle the verification challenges … Read More
The benefits of using EDA software is that it can automate a manual process, like PCB timing closure, saving you both time and engineering effort. This point was demonstrated today as Cadenceadded new timing-closure automation to their Allegroproduct family, calling it Allegro TimingVision. On Tuesday I spoke with Hemant Shah… Read More
Big SoC designs typically break existing EDA tools and old methodologies, which then give rise to new EDA tools and methodologies out of necessity. Such is the case with the daunting task of verification planning and management where terabytes of data have simply swamped older EDA tools, making them unpleasant and ineffective… Read More
This news is certainly not as amazing that the acquisition of MIPS by Imagination, or Arteris by Qualcomm… but it shows that Cadence is building a complete Interface IP port-folio, brick after brick. The result will be that a complete wall is being built on the Synopsys road to monopoly and complete success on Interface IP market.… Read More
IC designers contemplating the transition to 16nm FinFET technology for their next SoC need to be informed about design flow and IP changes, so TSMC teamed up with Cadence Design Systems today to present a webinar on that topic. I attended the webinar and will summarize my findings.
Shown below is a 3D layout concept of an ideal FinFET… Read More
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