First I want recognize that IEDM once again provided all of the attendees with the proceedings as soon as we arrived at the conference, in fact the proceeding included every year of IEDM back to 1955. This is how a conference should be run! Anyone who read my blog about the SPIE Advanced Lithography Conference will know how frustrating… Read More
Author: Scotten Jones
IEDM Advanced CMOS Technology Platform Session
Intel 2014 Investor Meeting and 14nm Status
Intel’s investor meeting was held yesterday and for me the presentation that is most interesting is Bill Holt’s. The presentations are available on the Intel website: Intel Corporation – Presentations Material 2014. Here is the 2013 version of this presentation: Intel Corporation – Presentations Materials 2013… Read More
IEDM 2014 Preview
The International Electron Devices Meeting (IEDM) is one of the premier conferences for the presentation of the latest semiconductor processes and process technologies. IEDM is held every year in December alternating between San Francisco and Washington DC. This year IEDM will be held at the San Francisco Hilton on December… Read More
Who Will Lead at 10nm?
There has been a lot of discussion on SemiWiki lately around 14nm FinFET technology and who really leads and by how much. I thought it would be interesting to review some process metrics for previous technology generation and then make some forecasts around 10nm.
The focus of this article will be Intel, TSMC and Global Foundries/Samsung… Read More
Intel Versus TSMC 14nm Processes
Intel has begun to release some details on their 14nm process. I thought it would be interesting to contrast what Intel has disclosed to TSMC’s 16nm process disclosure from last year’s IEDM (TSMC calls their 14nm process 16nm).
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The Leading Edge Foundry Landscape
There have been a lot of interesting announcements and presentations lately from the leading edge foundries. Looking at all of this information, a pretty interesting picture begins to emerge.
TSMC
TSMC is far and away the world’s largest foundry. In their 2014-Q2 conference call TSMC outlined their expectations for the balance… Read More
Setting the Record Straight on FD-SOI Costs
I recently published an article on Semiwiki “Is SOI Really Less Expensive”. That article was the result of months of careful research and analysis. I looked at planar FDSOI versus bulk planar, bulk FinFETs and FinFETs on SOI at three different nodes. I took a consistent set of assumptions with respect to the fab used to run the processes,… Read More
SEMICON Update: 450mm, EUV, FinFET, and More
I spent all of last week at SEMICON West meeting with customers, potential customers, partners and various industry analysts and experts. I was involved in many interesting discussions over the course of the week and I thought I would share some of the more interesting observations:
Alternate Fin Materials Pushed Out
I have for… Read More
Is SOI Really Less Expensive?
Introduction
There have been some claims made recently that planar Fully Depleted Silicon On Insulator (FDSOI) is less expensive than bulk planar processes and FinFETs at various nodes. Some of these claims suggest that FinFETs in particular are significantly more expensive. My company, IC Knowledge LLC produces the most widely… Read More
450mm Delayed and Other SPIE News
Last week I attended the SPIE Advanced Technology Conference. There were a lot of interesting papers and as is always the case at these conferences, there was a lot of interesting things to learn from talking to other attendees on the conference floor.
The first interesting information from the conference floor was that 450mm is… Read More
Chip War without Soldiers