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In the third installment of this series we discussed the status of DRAM scaling and Moore’s law. In this installment we will tackle logic. The focus will be on foundry logic.
Logic technology challenges
In the second installment of this series we discussed constant electric field scaling. As we mentioned in that installment at … Read More
In the second installment of this series we reviewed the cost drivers that have enabled the semiconductor industry to continue to cost reduce the cost per transistor year after year. In the next three installments we will discuss the product specific issues beginning with this installment discussing DRAM.… Read More
In the first installment of this series on Moore’s law we examined what Moore’s law is and presented some data on how it has affected the industry. In this installment we will discuss the manufacturing cost reduction strategies that have made Moore’s law possible.
Manufacturing Cost Drivers
The manufacturing cost of a semiconductor… Read More
April 19th is the fiftieth anniversary of Moore’s law! We thought it would be a good opportunity to reflect back on fifty years of Moore’s law, what it is, what it has meant to the industry, what the current status of the law is and what we may see in the future.
Moore’s law
Moore’s law is so well known that you wouldn’t think we would… Read More
On March 12 SEMI held a New England Forum breakfast event entitled “Wafers to Wallstreet” with four speakers. The main focus of the discussion was on the “Internet of Things” and the following are my impression from the talks in a bullet point format.
Device Scaling and Performance in the Era of IoT – Gary Rosen, Applied Materials… Read More
I previously published a summary of day 1 of SPIE and I wanted to follow up with observations from successive days.
SPIE, the international society for optics and photonics, was founded in 1955 to advance light-based technologies.Serving more than 256,000 constituents from approximately 155 countries, the not-for-profit … Read More
The SPIE Advanced Lithography Conference is the world’s premier conference for patterning techniques utilized to manufacture semiconductors. At any given time during the conference there are multiple parallel sessions so it is impossible to see all of the papers presented. Prior to the conference I reviewed and blogged on … Read More
Next week is the SPIE Advanced Lithography Conference in San Jose, the premier conference for advanced lithography used to produce state-of-the-art semiconductors. Last year I blogged after the conference about some of the key points I heard at the conference and this year I plan to do the same.
Last year’s blog is available HERE… Read More
Translating Intelby Scotten Jones on 01-28-2015 at 10:00 pmCategories: Foundries
Some of Intel’s technology posts make some pretty specific statements and I have seen a number of posts where people seem to have misinterpreted what Intel was actually saying.
Multi Patterning
I have seen a lot of confusion on this one with some people saying Intel didn’t use multi patterning at 22nm and others saying Intel used … Read More
At the heart of fabricating integrated circuits is the ability to selectively change the electrical properties of the semiconductor substrate. This key to fabrication is accomplished by doping – introducing atoms locally into the semiconductor substrate.
In the early days of the semiconductor industry doping was accomplished… Read More
Weebit Nano Brings ReRAM Benefits to the Automotive Market