Methodology to Minimize the Impact of Duty Cycle Distortion in Clock Distribution Networks

Methodology to Minimize the Impact of Duty Cycle Distortion in Clock Distribution Networks
by Kalar Rajendiran on 09-26-2022 at 6:00 am

Figure Gate Failing to Reach 1.1V

Synchronous circuits dominate the electronic world because clocking eases the design of circuits compared to asynchronous circuits. At the same time, clocking also introduces its share of challenges to overcome. No wonder, a tremendous amount of time and effort have been spent over the years on developing and implementing … Read More


Flex Logix: Industry’s First AI Integrated Mini-ITX based System

Flex Logix: Industry’s First AI Integrated Mini-ITX based System
by Kalar Rajendiran on 09-22-2022 at 10:00 am

AI Workflow for Development and Deployment

As the market for edge processing is growing, the performance, power and cost requirements of these applications are getting increasingly demanding. These applications have to work on instant data and make decisions in real time at the user end. The applications span the consumer, commercial and industrial market segments.… Read More


Truechip: Customer Shipment of CXL3 VIP and CXL Switch Model

Truechip: Customer Shipment of CXL3 VIP and CXL Switch Model
by Kalar Rajendiran on 09-12-2022 at 10:00 am

CXL Block Diagram

The tremendous amount of data generated by AI/ML driven applications and other hyperscale computing applications have forced the age old server architecture to change. The new architecture is driven by the resource disaggregation paradigm, wherein memory and storage are decoupled from the host CPU and managed independently… Read More


Five Key Workflows For 3D IC Packaging Success

Five Key Workflows For 3D IC Packaging Success
by Kalar Rajendiran on 08-31-2022 at 6:00 am

3D IC design workflows

An earlier blog started with the topic of delivering 3D IC innovations faster. The blog covered the following foundational enablers for successful heterogeneous 3D IC implementation.

  • System Co-Optimization (STCO) approach
  • Transition from design-based to systems-based optimization
  • Expanding the supply chain and tool
Read More

Getting Ahead with Semiconductor Manufacturing Equipment and Related Plasma Reactors

Getting Ahead with Semiconductor Manufacturing Equipment and Related Plasma Reactors
by Kalar Rajendiran on 08-25-2022 at 6:00 am

Figure 1 Dry Etching Process Classification

Advanced semiconductor fabrication technology is what makes it possible to pack more and more transistors into a sq.mm of a wafer. The rapidly increasing demand for advanced-process-based chips has created huge market opportunities for semiconductor manufacturing equipment vendors. According to SEMI, worldwide sales … Read More


Protecting Critical IP With Next-Generation Zero Trust Security

Protecting Critical IP With Next-Generation Zero Trust Security
by Kalar Rajendiran on 08-22-2022 at 6:00 am

Securing Access Controls

While semiconductors are the enablers for high-tech solutions, the semiconductor industry was not at the forefront of Cloud adoption. There were many valid concerns behind the slow adoption, a primary reason being the threat to intellectual property (IP) security. IP in this context refers to not just chip building blocks but… Read More


Delivering 3D IC Innovations Faster

Delivering 3D IC Innovations Faster
by Kalar Rajendiran on 08-16-2022 at 6:00 am

System Technology Co Optimization STCO

3D IC technology development started many years ago well before the slowing down of Moore’s law benefits became a topic of discussion. The technology was originally leveraged for stacking functional blocks with high-bandwidth buses between them. Memory manufacturers and other IDMs were the ones to typically leverage this … Read More


Flex Logix Partners With Intrinsic ID To Secure eFPGA Platform

Flex Logix Partners With Intrinsic ID To Secure eFPGA Platform
by Kalar Rajendiran on 08-11-2022 at 6:00 am

SoC Block Diagram with EFLX and QuiddiKey

While the ASIC market has always had its advantages over alternate solutions, it has faced boom and bust cycles typically driven by high NRE development costs and time to market lead times. During the same time, the FPGA market has been consistently bringing out more and more advanced products with each new generation. With very… Read More


DSP IP for High Performance Sensor Fusion on an Embedded Budget

DSP IP for High Performance Sensor Fusion on an Embedded Budget
by Kalar Rajendiran on 08-04-2022 at 6:00 am

VPX Vector DSP Core Data Types

Whether we realize it or not, everyday applications we use depend on data gathered by sensors. We can bet that pretty much every application uses at least a couple of different types of sensors, if not more. That is because different types of sensors are better suited to collect data depending on the application, the environment … Read More


OpenFive Joins Universal Chiplet Interconnect Express (UCIe) Consortium

OpenFive Joins Universal Chiplet Interconnect Express (UCIe) Consortium
by Kalar Rajendiran on 07-19-2022 at 10:00 am

Snapshot of Contributing Members of UCIe

Universal Chiplet Interconnect Express (UCIe) is an open specification that defines the interconnect between chiplets within a package. The objective is to enable an open chiplet ecosystem. Although the initial specification for UCIe was developed by Intel, a consortium was announced in March with Intel, AMD, Arm, Google,… Read More