Coherent Optics: Synergistic for Telecom, DCI and Inter-Satellite Networks

Coherent Optics: Synergistic for Telecom, DCI and Inter-Satellite Networks
by Kalar Rajendiran on 05-30-2023 at 10:00 am

Data Connectivity to the Edge

The telecommunications industry has experienced significant growth in recent years, driven by the increasing demand for high-speed internet and data services. This growth has created a surge in traffic on optical networks, leading to the development of new telecom network architectures that can support the increasing demand… Read More


IP Lifecycle Management for Chiplet-Based SoCs

IP Lifecycle Management for Chiplet-Based SoCs
by Kalar Rajendiran on 05-24-2023 at 10:00 am

IP Object for IPLM

Chiplet-based System-on-Chips (SoCs) are becoming increasingly popular in the semiconductor industry due to their potential to improve design efficiency, increase performance, and reduce costs. While chiplets are seen as a way to reduce the cost of innovation, they introduce a lot of challenges too. Packaging, interconnect… Read More


Driving the Future of HPC Through 224G Ethernet IP

Driving the Future of HPC Through 224G Ethernet IP
by Kalar Rajendiran on 05-23-2023 at 10:00 am

Advanced DSP Implementations

The need for speed is a never-ending story when it comes to data communications. Currently there are a number of trends such as cloud computing, artificial intelligence, Internet of Things (IoT), multimedia applications and consumer expectations driving this demand. All of these trends are accelerating the growth in high-performance-computing… Read More


Emerging Stronger from the Downturn

Emerging Stronger from the Downturn
by Kalar Rajendiran on 05-16-2023 at 6:00 am

Full Flow from HL Synthesis through to GDSII Accelerates the creation of AI IP

It was refreshing to hear a talk focused on emerging stronger from the downturn when the news and media are focused on the gloom. At the recent Siemens EDA User2User conference, Joe Sawicki, executive vice president, IC, gave an uplifting keynote talk to the audience. He highlighted a secular growth trend happening in the semiconductor… Read More


Chiplet Modeling and Workflow Standardization Through CDX

Chiplet Modeling and Workflow Standardization Through CDX
by Kalar Rajendiran on 05-15-2023 at 6:00 am

Chiplet Integration Workflow

Chiplet is a hot topic in the semiconductor world these days. So much so that if one hasn’t heard that term, the person must be living on a very isolated islet. Humor aside, products built using chiplets-based methodology have been in existence for at least some years now. Companies such as Intel, AMD, Apple and others have integrated… Read More


Alchip is Golden, Keeps Breaking Records on Multiple KPIs

Alchip is Golden, Keeps Breaking Records on Multiple KPIs
by Kalar Rajendiran on 05-10-2023 at 10:00 am

Alchip Revenue Breakdown along Nodes and Applications

I don’t know the story behind the name Alchip. I’ve been asking this question ever since its founding in 2003 and still haven’t found the answer. Wikipedia sometimes provides insights and stories behind names of companies, products and services but I couldn’t find any regarding the name Alchip. One thing is for sure. After its consistent… Read More


Tessent SSN Enables Significant Test Time Savings for SoC ATPG

Tessent SSN Enables Significant Test Time Savings for SoC ATPG
by Kalar Rajendiran on 05-08-2023 at 6:00 am

Pattern Generation Block Level ATPG Flow

SoC test challenges arise due to the complexity and diversity of the functional blocks integrated into the chip. As SoCs become more complex, it becomes increasingly difficult to access all of the functional blocks within the chip for testing. SoCs also can contain billions of transistors, making it extremely time-consuming… Read More


Memory Solutions for Modem, EdgeAI, Smart IoT and Wearables Applications

Memory Solutions for Modem, EdgeAI, Smart IoT and Wearables Applications
by Kalar Rajendiran on 05-04-2023 at 10:00 am

PSRAM Interface Controller Block Diagram

Memories have always played a critical role, both in pushing the envelope on the semiconductor process development front and supporting the varied requirements of different applications and use-cases. The list of the various types of memories in use today runs long. At a gross level, we can classify memories into volatile or … Read More


Achieving Optimal PPA at Placement and Carrying it Through to Signoff

Achieving Optimal PPA at Placement and Carrying it Through to Signoff
by Kalar Rajendiran on 05-02-2023 at 10:00 am

PreRoute PostRoute Net Length Correlation

Performance, Power and Area (PPA) metrics are the driving force in the semiconductor market and impact all electronic products that are developed. PPA tradeoff decisions are not engineering decisions, but rather business decisions made by product companies as they decide to enter target end markets. As such, the sooner a company… Read More


How to Enable High-Performance VLSI Engineering Environments

How to Enable High-Performance VLSI Engineering Environments
by Kalar Rajendiran on 04-25-2023 at 10:00 am

License Operations Figure

Very Large Scale Integration (VLSI) engineering organizations are known for their intricate workflows that require high-performance simulation software and an abundance of simulation licenses to create cutting-edge chips. These workflows involve complex dependency trees, where one task depends on the completion of another… Read More