You may have seen this Press Release (see below) announcing that Dolphin Integration (Dolphin) has been acquired by Soitec (60%) and MBDA (40%) – you can see more information about these two companies at the bottom of this blog. Founded in 1985, Dolphin had some recurrent cash flow issues during the last couple of years, that they… Read More
Author: Eric Esteve
The Rebirth of Dolphin Integration!
USB 3.x IP Revenue Have Grown by 31% in 2017 (IPnest)
Despite the strong consolidation in the semiconductor industry, the Design IP market is going well, very well with YoY growth of 12%+ in 2017, according with the “Design IP Report” from IPnest. If we look at the Interface IP category (20% growth in 2017) and analyze the IP revenues by protocols, we can see that USB IP is amazingly healthy,… Read More
Low Cost Power NB-IoT Solution? Fusion F1 DSP based Modem!
Supporting NB-IoT requires low cost (optimized silicon footprint) and ultra-low power solution to cope with IoT device requirement. Cadence Fusion F1 DSP IP has been integrated in modem IC by two new customers, Xinyi and Rafael, gaining traction in NB-IoT market. These design-win builds on previous momentum: software GPS solution… Read More
Apple and China to kill Intellectual Property?
The recent (since 2016) news about Apple, China, FTC and other organizations positioning in respect with IP are concerning, as it seems indicating that Intellectual Property in general (Design IP and Technology IP) is at risk. Let’s consider several facts through different cases, involving ARM, Qualcomm, Imagination Technologies… Read More
The Best of IP at DAC 2018 Conference
Design IP is going well, with 12% YoY growth in 2017, even if the market is about $3.5B. But Design IP is serving a $400B semiconductor market. Can you imagine the future of the semi market if the chip makers couldn’t have access to Design IP? The same is true for EDA: it’s a niche market (CAE revenues was about $3B and IC Physical Design… Read More
Welcome DDR5 and Thanks to Cadence IP and Test Chip
Will we see DDR5 memory (device) and memory controller (IP) in the near future? According with Cadence who has released the first test chip in the industry integrating DDR5 memory controller IP, fabricated in TSMC’s 7nm process and achieving a 4400 megatransfers per second (MT/sec) data rate, the answer is clearly YES !
Let’s come… Read More
Tensilica 5th Generation DSP: Mix of Vision and AI
Cadence has launched the new Tensilica Vision Q6 DSP IP, delivering 1.5x more performance than the former Vision P6 DSP IP and 1.25X better power efficiency. According with Cadence, the mobile industry is moving from traditional feature-based embedded vision to AI-based algorithm, even if all use cases still have mix of vision… Read More
Wanted by January 30th: Paper for DAC IP Track 2018!
DAC 2018 will take place in San Francisco in June (24 to 28) and you have a fantastic opportunity to present a paper in the IP track! In fact, the deadline has been extended to January 30[SUP]th[/SUP] to submit your proposal.
Let’s make it clear: you are not expected to send the completed paper by this date, just the following:
- The title
Achieving ISO 26262 Certification with ASIL Ready IP
According with McKinsey, “analysts predict revenue growth for advanced driver assistance systems (ADAS) to be up to 29 percent, giving the segment one of the highest growth rates in the automotive and related industries.” Design cycle in automotive segment is much longer than in segments like mobile, PC or consumer. If you expect… Read More
French Tech at CES, 2nd country after USA with 274 Start-Up at Eureka Park!
France exposure will be very strong at Las Vegas CES this year, the 3[SUP]rd[/SUP] country with 365 companies, behind USA and China. If you just take the start-up number into account, 274 French start-ups will be present, just behind the USA with 280 start-ups! If you look back, it’s a great jump compared with 2017 (178 start-up) … Read More
Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI