One chip and the MCU variant challenge disappears

One chip and the MCU variant challenge disappears
by Don Dingee on 11-09-2016 at 4:00 pm

Merchant microcontrollers are usually made available in a wide range of variants based on one architecture with different peripheral payloads and packaging options. A couple of companies, notably Cypress with their PSoC families and Silicon Labs with the EFM8 Laser Bee… Read More


Protium for the win in software development

Protium for the win in software development
by Don Dingee on 11-02-2016 at 4:00 pm

Cadence Design Systems is a long-standing provider in hardware emulation, but a relative newcomer to FPGA-based prototyping. In an upcoming lunch and learn session on November 11 in San Jose, Cadence teams will be outlining their productivity strategy. What’s different with their approach and why is this worth a lunch?… Read More


Behind the 3DEXPERIENCE for Silicon

Behind the 3DEXPERIENCE for Silicon
by Don Dingee on 10-31-2016 at 4:00 pm

We’ve been covering the Dassault Systèmes “Silicon Thinking” platform for a while here, but, as I’m often prone to do, I wanted to explore the backstory to uncover more about the concept. With over 25M users of their product lifecycle management (PLM) solutions, why is Dassault Systèmes becoming so interested in semiconductor… Read More


Can one flow bring four domains together?

Can one flow bring four domains together?
by Don Dingee on 10-28-2016 at 4:00 pm

IoT edge device design means four domains – MEMS, analog, digital, and RF – not only work together, but often live on the same die (or substrate in a 2.5D process) and are optimized for power and size. Getting these domains to work together effective calls for an enhanced flow.

Historically, these domains have not played together … Read More


Automation for managed system-of-systems design

Automation for managed system-of-systems design
by Don Dingee on 10-26-2016 at 4:00 pm

Anybody who has done any bus & board system design knows the problem. Merchant boards typically have standardized pinouts (after years of haggling in standards organizations) for the backplane bus, and a group of user-defined pins for daughtercard I/O. Homegrown systems usually have a just-as-carefully defined proprietary… Read More


FPGAs for a few thousand devices more

FPGAs for a few thousand devices more
by Don Dingee on 10-24-2016 at 4:00 pm

An incredibly pervasive trend at last year’s ARM TechCon was the IoT, and I expect this year to bring even more of the same, but with a twist. Where last year was mostly focused on ultra-low power edge devices and the mbed ecosystem, this year is likely to show a better balance of ideas across all three IoT tiers. I also expect a slew of … Read More


There is more than C to worry about

There is more than C to worry about
by Don Dingee on 10-17-2016 at 4:00 pm

We periodically see that “software ate the world” line – I’m pretty sure I’ve used it a couple times myself. The fact is, software doesn’t run itself; never has, never will. Somewhere there has to be an underlying computer. First it was on beads, then in gears, then in tubes.… Read More


Adding DSP hardware shrinks energy for MCU core

Adding DSP hardware shrinks energy for MCU core
by Don Dingee on 10-14-2016 at 4:00 pm

ARM’s Cortex-M4 processor core represented quite a breakthrough in digital signal controller technology when launched in 2010. Adding a single-cycle multiplier and SIMD instructions enabled basic DSP algorithms while retaining the low power benefits of an MCU. New technology circa 2016 – embedded programmable logic – can… Read More


Case study illustrates 171x speed up using SCE-MI

Case study illustrates 171x speed up using SCE-MI
by Don Dingee on 10-12-2016 at 4:00 pm

As SoC design size and complexity increases, simulation alone falls farther and farther behind, even with massive cloud farms of compute resources. Hardware acceleration of simulation is becoming a must-have for many teams, but means more than just providing emulation… Read More