In a fantasy world where there were no coding errors or integration issues, FPGA designs would fly straight through synthesis easily and quickly. Maybe that world does exist somewhere. For the rest of us, who have experienced the agony of running a large FPGA design – again – only to find another error and have to start over, there … Read More
Author: Don Dingee
Dear Santa, please bring technology that brings us together
Dear Santa,
It has been many years since I have written you. I was taught never to ask anyone for anything for myself, that it is a presumptuous and selfish thing to do, so this is not for me. I know you are busy filling the wish lists of children everywhere, but wanted to take a moment to ask for your help for everyone.… Read More
Here to make my stand, with a chipset in my hand
Yesterday, I clicked “like” on a LinkedIn post with the title “TI Cuts 1,700 Jobs”. Today, I read the analysis and pulled out Social Distortion’s “Still Alive” for inspiration. I’ve been through this more than once. For them it’s not like-worthy, and I feel their sting.
The part of the post I liked was the comment: “This is good for … Read More
The logic of trusting FPGAs through DO-254
Any doubters of the importance of FPGA technology to the defense/aerospace industry should consider this: each Airbus A380 has over 1000 Microsemi FPGAs on board. That is a staggering figure, especially considering the FAA doesn’t trust FPGAs, or the code that goes into them.… Read More
Embedding 100K probes in FPGA-based prototypes
As RTL designs in FPGA-based ASIC prototypes get bigger and bigger, the visibility into what is happening inside the IP is dropping at a frightening rate. Where designers once had several hundred observation probes per million gates, those same several hundred probes – or fewer if deeper signal captures are needed – are now spread… Read More
Did the MIPS acquisition just doom Vivante?
By now, you’ve probably read about the Imagination Technologies acquisition of MIPS somewhere, hopefully in the Eric Esteve article here. There’s an interesting side effect not being talked about much.… Read More
Beneath the Surface lies the first real test
At CES 2011, Steven Sinofsky of Microsoft stepped on the stage and went off the map of proven Windows territory. Announcing the next version of Windows would support the ARM Architecture, including SoCs from Qualcomm, NVIDIA, and TI, set a new course for Microsoft.
But Windows, being the battleship-sized behemoth that it is, would… Read More
SoC emulation syncs up with SuperSpeed USB
They say what adds value is to take something difficult and make it look simple. USB looks so simple when it is done right, but designers know it can be one of the more tempermental features in an SoC, especially in the latest SuperSpeed incarnation.… Read More
Hybrids on BeO then, 3D-IC in silicon now
Once upon a time (since every good story begins that way), I worked on 10kg, 70 mm diameter things that leapt out of tubes and chased after airplanes and helicopters. The electronics for these things were fairly marvelous, in the days when surface mount technology was in its infancy and having reliability problems in some situations.… Read More
12m FPGA prototyping sans partitioning
FPGA-based prototyping brings SoC designers the possibility of a high-fidelity model running at near real-world speeds – at least until the RTL design gets too big, when partitioning creeps into the process and starts affecting the hoped-for results.
The average ASIC or ASSP today is on the order of 8 to 10M gates, and that includes… Read More
More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay