Reading Intel analysis lately has been a lot like reading fantasy baseball analysis. Intel should buy Altera. Intel should waive Atom. Intel should fab for Apple. All of those have a near-zero probability of happening IMHO, and yet pundits continue to pitch their version of alternate reality, dealing away product lines and strategies… Read More
Author: Don Dingee
A song of optimization and reuse
If you hang around engineers for any time at all, the word optimization is bound to come up. The very definition of engineer is to contrive or devise a solution. With that anointing, most engineers are beholden to the idea that their job is creating, synthesizing, and perfecting a solution specifically for the needs of a unique situation.… Read More
I’ll be with you in a second
One aspect of always-on is power conservation, being able to respond to events without having a device constantly in full-power mode. This month, the announcement of the Amazon Fire Phone and details revealed about the Google Android Wear SDK suggest another important dimension: the competitive advantage of rapid, frictionless… Read More
Real FPGAs don’t eat fake test vectors
Vector blasting hardware is as old as digital test methodology itself. In the days of relatively simple combinational and finite state machine logic, a set of vectors aimed broadside at inputs could shake loose most faults with observable outputs. With FPGAs, creating an effective set of artificial test vectors has become a lot… Read More
On the Road from Makers to Consumers
It’s time to break with conventional thinking. For decades, the measure of success for semiconductors has been OEM design wins. Most consumers haven’t known, or cared, about what is inside their electronic gadgets, as long as they work. That may be about to change, because a new intermediary is finding its voice – and being… Read More
Non-separation of power and performance
How much power does a system consume? The simplistic path to power estimation for a system used to be tossing a few metrics – standby, typical, worst case, with figures pulled from a datasheet, simulation, or physical measurement – into a spreadsheet. After filling the remaining holes with SWAG (scientific wild-ass guesses), … Read More
Always-on and the new wearable core
Recently, I mentioned smartphone SoCs consume one, maybe two orders of magnitude too much power for broader use in wearables. However, that is only when they are “on”. To save power and stretch battery life, smartphones spend a lot of time napping – display off, sitting still with MEMS sensors powered down, waiting for an incoming… Read More
Sidense NVM IP clears TSMC9000 at 28nm
Maybe I’ve spent too many years whiffing solder flux fumes and absorbing doses of X-band radiation in anechoic chambers, but I’m a firm believer in the axiom: “Give me enough engineers, and I can get 10 of anything to work right, once.” We have to make this … fit into this … using only this stuff … is what legends are made of.… Read More
Understanding QoR in FPGA synthesis
We’ve all heard this claim: “Our FPGA synthesis tool produces better quality of results (QoR).” If you’re just hoping for a tool to do that automagically, you’re probably doing it wrong. Getting better QoR depends on understanding what an FPGA synthesis tool is capable of, and how to leverage what it tells you.… Read More
What’s not quite MCU, and not quite SoC?
There has been a lot of railing lately about how we don’t have quite the right chips for the upcoming wave of wearables. Chips one would drop in a smartphone are often overkill and overpowered, burning through electrons too quickly. Chips one would use for a simple control task generally lack peripherals and performance, offsetting… Read More
Should Intel be Split in Half?