Synopsyshosted an AMS Luncheon panel today at DACin the Westin Hotel and invited four customers to talk about their actual design challenges and experiences. I’ve typed up my notes from this event.… Read More
Author: Daniel Payne
Affordable AMS EDA Tools at DAC
First thing at DACtoday I met with Greg Lebsack of Tanner EDA to ask about what’s new in the past year for his EDA company. Here are my meeting notes, so there’s not much prose for my DAC blogs this year.
… Read More
Gary Smith at DAC
Gary Smith once again wore his signature white coat and extolled the virtues of system level design and automation. The room at the Intercontinental was packed, and the folks in the hallway outside were noisy as usual, eager for the party to start after Gary finished.… Read More
Active Power Management in UPF Using SPICE, VHDL-AMS or Verilog-AMS
My former co-worker, Kenneth Bakalar at Mentor Graphics is an expert in AMS modeling languages and UPFmethodology, so he recently teamed up with Eric Jeandeau to author an interesting white paper: Interpreting UPF for a Mixed-Signal Design Under Test. This white paper is based on a presentation made at DVCon earlier this year.… Read More
How About a Quality-Aware IP Design Flow
In the EDA world we use hyphens quite often to describe our technical approaches, like: DFM-aware, Power-aware, Variation-aware. I just read a white papertoday on the topic of Quality-Aware IP Design Flows, written by Fractal Technologies. If your group creates IP or re-uses IP, then there’s always the question about … Read More
Two New ESL Tools for Power and Thermal at DAC
Gary Smith published a list of what to see at DAC, and I noticed that he listed DOCEA Power in a category of ESL Thermal. I’ll be meeting the DOCEA engineers on Wednesday at DAC to learn more about their two newest ESL products:
- Thermal Profiler
- Power Intelligence
In general DOCEA Power tools allow you to manage power and thermal… Read More
Different Approaches to System Level Power Modeling and Analysis for Early Design Phases
At DATEthis year in Dresden, Bernhard Fischer from Siemens CT(Corporate Technology) has presented an interesting summary of the various techniques used for power modeling and analysis at the architectural level. He went through the pros and cons of using spreadsheets, timed virtual platforms annotated with power numbers … Read More
Virtual Prototype Collaboration
The concept and use of virtual prototypes continues to grow each year in electronics design, mostly because it really does shorten product development cycles by allowing software engineers to start early debug and fix errors prior to production. Other useful benefits to virtual prototyping include software optimization, … Read More
Full-Custom Low Power Design Methodology
Digital designers have used logic optimization and logic synthesis for decades as a means to produce more optimal designs with EDA tools. On the analog and transistor-level side of design the efforts to automatically optimize for speed or power have generally been limited to circuits with only a handful of transistors. These … Read More
A Brief History of the Apple MacBook Pro
I’m typing this blog today with my trusty Apple MacBook Pro – a 17″ laptop with matte display and 16GB of RAM, but don’t stereotype me as an Apple fanboy because I also own the fantastic Samsung Galaxy Note II phone (aka phablet). Some industry pundits would have us believe that desktops and laptops are going… Read More
Facing the Quantum Nature of EUV Lithography