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In our semiconductor ecosystem we often specialize the engineers and therefore EDA tools into separate silos like Foundry, front-end design, back-end design, tapeout, etc. What I discovered at #53DAC a few weeks ago was that some EDA companies actually bridge the gap between foundry engineers and IC designers with their tools.… Read More
At the #53DAC earlier this month held in Austin, Texas I met up with Renee Donkers, the founder of Fractal Technologies. His company has been focused on improving the quality of semiconductor IP cells through the use of automated checking software. The highest area of growth in EDA as measured by the ESD Alliance is in the reusable… Read More
IC design challenges are different at advanced nodes like 7nm, so to learn more about the topic I attended a panel luncheon at DAC sponsored by Cadence. The moderator was both funny and technically astute, quite the rare combination, so kudos to Professor Rob Rutenbar, a former Neolinear guy now at the University of Illinois. Panelists… Read More
Last week at the #53DAC conference there was a lot of excitement in the air about custom IC design, especially at the luncheon that I attended on Tuesday from Synopsys where they had customers like STMicroelectronics, GSI Technology, Samsung Foundry and the Synopsys IP group talk about their experiences using the new Custom Compiler… Read More
The number one EDA+IP vendor in our industry today is Synopsys, and their eloquent leader is Aart de Geus, so I expect that the Monday interview at #53DAC on June 6th will be well attended and worthwhile to witness in the DAC Pavilion, start time is 11:30AM, so arrive early to get a seat. One of Aart’s coined words is Technomics,… Read More
For bloggers like myself spending four days at #53DAC is almost a non-stop blur of activity, visiting EDA vendors, IP providers and foundries to learn about what’s happening in our semiconductor industry. Cadence is both an EDA vendor and IP provider, so DAC is a great showcase for them to tell us what’s new in 2016 and… Read More
I live in Tualatin, Oregon just a few miles away from the corporate headquarters of the #3 EDA company in the world, Mentor Graphics. Since DAC is fast approaching, I thought it would be useful to give you a quick overview of what Mentor is going to be talking about in Austin, Texas during June 5-9. … Read More
When I hear the company name of ANSYS the first EDA tool category that comes to mind is power noise sign-off. Going to DAC is a great way to find out what’s new with EDA, IP and foundries. There are three places that you can find ANSYS at DAC this year:… Read More
I’ve done SRAM and DRAM design before as a circuit designer from 1978-1986, but in 2016 there are so many more challenges to using 28nm and 14nm on FDSOI technology. One way to keep abreast of SRAM design is to read conference papers, so I just finished a paper from authors at STMicroelectronics and MunEDA presented at the IEEE… Read More
I’m attending the 53rd Design Automation Conference (DAC) in Austin, Texas starting June 5th, and there are at least seven reasons that you should consider attending as well. For decades now DAC has been the premier place for all the players in our semiconductor ecosystem to get together: Academics, Commercial vendors … Read More
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Selling the Forges of the Future: U.S. Report Exposes China’s Reliance on Western Chip Tools