How Intel will Beat Samsung

How Intel will Beat Samsung
by Daniel Nenni on 03-09-2022 at 6:00 am

Intel vs Samsung

Now that Intel is back in the foundry business, and with the Tower Semiconductor acquisition they are definitely back in the foundry business, Samsung will be the biggest foundry loser here.

You can break the IDM foundry business into two parts: First, and foremost, the NOT TSMC Business. Second is the the Better PPA (Power/Performance,… Read More


Prototype enables new synergy – how Artosyn helps their customers succeed

Prototype enables new synergy – how Artosyn helps their customers succeed
by Daniel Nenni on 03-08-2022 at 6:00 am

LS Dual

Artosyn Microelectronics, a leading provider of AI SoCs for drones and other sophisticated applications finds itself at the intersection of hardware architecture and software development. “Our customers are advancing the state of AI programming every day,” said Shen Sha, Senior R&D Manager of Artosyn’s AI Chip Department.… Read More


Integrating Materials Solutions with Alex Yoon of Intermolecular

Integrating Materials Solutions with Alex Yoon of Intermolecular
by Daniel Nenni on 03-04-2022 at 6:00 am

6 Alex Yoon headshots small

I had a follow-on discussion with Alex Yoon from our podcast last year.  He is as a Head of Strategic and Emerging Technologies and partnerships at Intermolecular, part of EMD electronics.

Prior to joining EMD electronics, he was Senior Technical Director at Lam Research, led activities in emerging memory and novel materials … Read More


Intel Evolution of Transistor Innovation

Intel Evolution of Transistor Innovation
by Daniel Nenni on 03-03-2022 at 10:00 am

Intel Transistor Innovations 1971

Intel recently released an exceptional video providing an insightful chronology of MOS transistor technology.  Evolution of Transistor Innovation is a five-minute audiovisual adventure, spanning 50 years of Moore’s Law.  Some of the highlights are summarized below, with a few screen shot captures – the full video is definitely… Read More


Sondrel explains the 10 steps to model and design a complex SoC

Sondrel explains the 10 steps to model and design a complex SoC
by Daniel Nenni on 03-02-2022 at 10:00 am

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Sondrel just released a position paper on how to model and design a complex ASIC. We have been following Sondrel for the past year and I have found their collateral to be excellent. Here is the position paper overview, a description of the new Sondrel modeling tool, the 10 steps, and of course a link to download the paper:

Overview
It… Read More


WEBINAR: Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)

WEBINAR: Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)
by Daniel Nenni on 03-01-2022 at 6:00 am

Mirabilis Webinar AI SoC

Among the multiple technologies that are poised to deliver substantial value in the future, Artificial Intelligence (AI) tops the list.  An IEEE survey showed that AI will drive the majority of innovation across almost every industry sector in the next one to five years.

As a result, the AI revolution is motivating the need for … Read More


Breker Verification Systems Unleashes the SystemUVM Initiative to Empower UVM Engineering

Breker Verification Systems Unleashes the SystemUVM Initiative to Empower UVM Engineering
by Daniel Nenni on 02-28-2022 at 6:00 am

SystemUVM Language Characteristics

The much anticipated (virtual) DVCON 2022 is happening this week and functional verification plus UVM is a very hot topic.  Functional Verification Engineers using UVM can enjoy a large number of benefits by synthesizing test content for their testbenches. Abstract, easily composable models, coverage-driven content, deep… Read More


CEO Interview: Tamas Olaszi of Jade Design Automation

CEO Interview: Tamas Olaszi of Jade Design Automation
by Daniel Nenni on 02-25-2022 at 6:00 am

Tamas Olaszi

Why does the industry need another register management tool? This is a question that Tamas Olaszi, the founder of Jade Design Automation hears from time to time since Jade-DA brought Register Manager, their EDA tool, to market. So why?

There is a genuine answer to this question but first let me use this interview to give some helpful… Read More


Scalable Verification Solutions at Siemens EDA

Scalable Verification Solutions at Siemens EDA
by Daniel Nenni on 02-24-2022 at 6:00 am

Andy Meier 2

Lauro Rizzatti recently interviewed Andy Meier, product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy is a product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy has held positions in the electronics and high-tech fields during his 20-year career including: Sr.Read More


Automated Documentation of Space-Borne FPGA Designs

Automated Documentation of Space-Borne FPGA Designs
by Daniel Nenni on 02-21-2022 at 10:00 am

Kepler Schem

Over the past three years, I’ve spoken frequently with Cristian Amitroaie, CEO and co-founder of AMIQ EDA, to understand how the company is helping engineers cope with the challenges of chip design and verification. With their broad customer base and many years of experience in the EDA business, the folks at AMIQ really seem to … Read More