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Silvaco Talks Atoms to Systems – Where to Next?

Silvaco Talks Atoms to Systems – Where to Next?
by Randy Smith on 07-17-2019 at 10:00 am

At the ES Design West event in San Francisco last week Silvaco’s CTO and EVP of Products, Babak Taheri, gave a presentation titled, “Next Generation SoC Design: From Atoms to Systems”. The time slot for the talk was only 30-minutes which is simply not enough to discuss all the technology Silvaco is providing now. I had not looked closely at Silvaco in a while. I came away with a strong feeling that they are more like an iceberg – there is a lot beneath the surface, and their technology breadth is much more than most people realize. If you are not using them already, you probably should be.

It was only 3 years ago that Silvaco acquired IPextreme, launching the company’s semiconductor design IP portfolio. Silvaco’s breadth in IP now encompasses more than 100 production-proven IP cores and foundation IP libraries (e.g., I/O, standard cells, memories). With their business model, they will also help commercialize captive design IP from semiconductor companies, such as Samsung Foundry, and include the application of their unique IP fingerprinting technology.

Although all the technology areas are related to some extent, I view design IP as more of a “systems” product. What was intriguing me in the talk was the focus on “atoms”. Let’s face it, in the EDA world, even when EDA was called CAD, we always talked about systems. I don’t remember much discussion on atoms in semiconductor design since my last course in electromagnetic theory in college. Slide 8 of the presentation was titled “Design Technology Co-optimization (DTCO)”. It showed a Silvaco flow from the functions Process Simulation to Device Simulation to Automatic Parameter Extraction and into Circuit Simulation. There were some other cyclical pieces after that, but the first two boxes are what drew my attention. I worked at Celestry before it was acquired by Cadence and Celestry had significant TCAD business related to transistor modeling. So, what I think we must conclude from Babak’s message is that something important is changing here. All the new technologies which are evolving rapidly (MRAM, RRAM, advances in Flash and any other non-volatile memory technologies) taken together with feature sizes that can be measured in a few atoms demand that we rethink the approach to design. Masks are expensive; production is costly and time-consuming. New tools will be needed to make sure the silicon will function as intended. The first two boxes in the slide above were marked as Victory Process and Victory Device. A common platform of products related to process simulation and device simulation at the atomic level?

Apparently – Yes. Victory Process™ is a general purpose 1D, 2D and layout-driven 3D process simulator for applications including etching/deposition, implantation, annealing, and stress simulation. Victory Device™ enables device technology engineers to simulate the electrical, optical, chemical, and thermal behavior of semiconductor devices. Victory Device is physics-based and simulates in 2D and 3D using an advanced tetrahedral meshing engine for improved accuracy. Clearly, 3D simulation is a must for finFET technologies. In his talk, Babak mentioned the need for tools that contemplate a small number of atoms in some of the semiconductor structures. The base technology is all here at Silvaco, and if you are doing this type of work you should use it now. Still, what will be needed next? I am sure Silvaco is thinking about it.

About Dr. Babak Taheri
Babak Taheri is the CTO and EVP of products at Silvaco, a leading EDA Software Company. He manages the TCAD, EDA, and IP product divisions at Silvaco. Previously, he was the CEO / president of IBT working with investors, private equity firms, and startups on M&A, technology, and business diligence. He also held VP/GM roles at Cypress Semiconductors, Invensense (now TDK) and key roles at SRI International and Apple. He received his Ph.D. in biomedical engineering from UC Davis with majors in EECS and Neurosciences, has over 20 published articles and holds 28 issued patents.

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