Years ago I bought my ancestral home, the house where my beloved grandparents lived, the place in which I grew up. It was more an emotional investment than a financial one, much more. After completely renovating it with my keyboard hardened hands, reliving much of my childhood, I joined the ranks of the slum lords and rented the house out to complete strangers. Thanks to ungrateful renters, inconsiderate neighbors, and a vindictive housing inspector, there are no thrills left whatsoever, just tedium and frustration. Blogging about EDA is much the same, the roller coaster excitement is pretty much over, now it is more of a carousel ride, so yes the EDA I once knew is dead.
EDA really came into its own with the advent of the fabless semiconductor manufacturing model pioneered by companies like VLSI Technology and LSI Logic. Using excess Japanese manufacturing capacity and building its own fabs locally, they built Application Specific Integrated Circuits (ASICs) and offered ASIC services for emerging fables semiconductor companies. A few years later TSMC introduced the pure-play foundry model promoting manufacturing efficiencies and commercially available EDA software. At that time semiconductor manufacturing processes were very different and could be exploited for competitive gains, re-usable Semiconductor IP was in its infancy, so the value proposition of EDA software was clear and present. Today, unfortunately, that is no longer the case. Commercial Semiconductor IP dominates the area of an ASIC and designs can be moved to second and third source foundry partners with little or no change. The biggest design challenge now is adapting to the new process geometries which requires hands-on experience.
The fabless ASIC Services business re-emerged in the year 2000 starting with eSilicon, followed by VeriSilicon, Alchip, Open-Silicon and a whole host of others. It has been a long, hard road with fierce competition (even coming from the foundries themselves with Global Unichip and Faraday). Honestly I did not see the long term value proposition back in 2000 but clearly it is here today. ASIC services can cut total costs by one third and significantly reduce the internal risk of designing to a new geometry. You can also minimize front end expense (IP/NRE) and back load the cost on a per packaged chip pricing agreement.
So where does that leave EDA? Venture Capital has left the semiconductor, IP, and EDA market segments so budgets are a fraction of what they once were. ASIC design starts are rapidly declining, EDA innovation is stalled, and ASIC Services companies are multiplying like rabbits. What else are unemployed ASIC designers going to do, work at Starbucks? Not to mention a smattering of foundry created EDA tools now hitting designer’s desks, which is understandable. As manufacturing processes become commodity, foundries will use proprietary EDA software and design enablement services to support their wafer value proposition. Bottom line: the ASIC Services market is $1B+ today and projected to exceed $10B by 2015, EDA on the other hand is a flat $4B industry that is still living in the house it grew up in.
