Since most of you have not heard of Novocellthis is more of an introduction but they have been around for 10+ years and are NVM (non-volitile memory) pioneers. NVM has evolved into a critical part of the semiconductor ecosystem which is why I sought them out. While SiDense and Kilopass bury each other in legal fees Novocell is doing some very clever things.
NOVOCELL, formerly Intelligent Micro Design, was founded in 2001 and has become the foundation of a growing semiconductor industry in the Pittsburgh region. As a member of The Pittsburgh Technology Collaborative (TTC), Novocell is part of a research network that includes Carnegie Mellon University, Penn State University, The University of Pittsburgh and other TTC member companies.
I had breakfast with the Novocell guys last week and saw them again at the SEMICO IP Ecosystem Conference. I’m a big fan of NVM from my Virage days so you will be reading much more about Novocell on SemiWiki. Here is a description of the Novocell design methodology:
Back at the birth of the antifuse OTP market, David Novosel designed the original NovoBlox OTP memory with the goal of creating one of the most highly reliable memory IPs on the market. It was this goal that gave birth to the unique Smartbit™ bit cell and the many patents Novocell has been awarded over the subsequent years. When developing every product since the initial NovoBlox IP, Novocell’s design team has ensured that the initial standards for “incredible reliability” has never been compromised.
Conscious tradeoffs were made in the design of the initial NovoBlox OTP NVM, specifically trading off size for reliability. Novocell was not driven by creating the smallest memory footprint IP on the market, but we do take immense pride in designing and supplying the most reliable. Since that initial product offering, Novocell has incorporated countless design changes and innovations, some to increase reliability and convenience to customers, and some which have led to smaller area. And, while some competitive memory products may take up less space on an IC in certain configurations, there is no guarantee that those IPs will perform at a par, or better, than Novocell 100% of the time.
To maximize reliability, the breakdown voltage in all Smartbit-based NVM IP is contained entirely within the memory core guaranteeing that only the programmed cells see high voltage. The reliability of unprogrammed cells or other devices on the IC are not negatively impacted with Novocell’s design methodology. Our Smartbit technology also features adynamic(not static, statistically-timed) write protocol withactivesensing which ensures hard breakdown of the gate oxide and the creation of a permanent short between the gate polysilicon and the channel of a programmed device—it’s the foundation of our Smartbit technology, and a feature of our IP that no other antifuse OTP supplier can ever replicate.
You can also visit the Novocell landing page on SemiWiki HERE. Dr. Eric Esteve did a nice blog on Novocell and the NVM market HERE. NVM applications are endless and a very big part of mobile so you will be reading much more about it in the very near future.
Share this post via: