TMR approaches should vary by FPGA type

TMR approaches should vary by FPGA type
by Don Dingee on 06-20-2016 at 4:00 pm

We’ve introduced the concepts behind triple modular redundancy (TMR) before, using built-in capability in Synopsys Synplify Premier to synthesize TMR circuitry into FPGAs automatically. A recent white paper authored by Angela Sutton revisits the subject… Read More


OpenPOWER Keeps On Truckin’ At Annual Development Summit

OpenPOWER Keeps On Truckin’ At Annual Development Summit
by Patrick Moorhead on 06-06-2016 at 4:00 pm

The OpenPOWER Foundation, a collection of companies that have coalesced around IBM’s POWER architecture recently had their OpenPOWER Summit in San Jose, California. OpenPOWER was founded by IBM, Google, Tyan and Mellanox to coalesce around IBM’s approach towards opening up the POWER architecture to anyone that wishes to licenseRead More


S2C tutorial and PROTOTYPICAL debut at DAC

S2C tutorial and PROTOTYPICAL debut at DAC
by Don Dingee on 05-18-2016 at 4:00 pm

It’s been a busy few days here in Canyon Lake, and we’re ready to share exciting news in advance of #53DAC coming up on Monday, June 6[SUP]th[/SUP]. S2C is offering a technical program tutorial on “Overcoming the Challenges of FPGA Prototyping” followed by the launch of our latest book project, “PROTOTYPICAL”, including a field… Read More


One FPGA synthesis flow for different IP types

One FPGA synthesis flow for different IP types
by Don Dingee on 05-06-2016 at 4:00 pm

Both Altera and Xilinx are innovative companies with robust ecosystems, right? It would be a terrible shame if you located the perfect FPGA IP block for a design, but couldn’t use it because it was in the “wrong” format for your preferred FPGA. What if there were a way around that?

There is a compelling argument to use each FPGA vendor’s… Read More


SpyGlass DFT ADV accelerates test closure – Xilinx and Synopsys webinar

SpyGlass DFT ADV accelerates test closure – Xilinx and Synopsys webinar
by Bernard Murphy on 04-26-2016 at 12:00 pm

Fed up with ECOing your way out of test problems? You might want to register for this webinar.When you’re building monster SoC FPGAs, you have all the same problems you have with any other SoC. That includes getting to very high test coverage as quickly as you can with a design targeted to the most advanced processes. We’re not just … Read More


Join the Multi-die IC session on April 21 at EDPS 2016 in Monterey, CA

Join the Multi-die IC session on April 21 at EDPS 2016 in Monterey, CA
by Herb Reiter on 04-14-2016 at 12:00 pm

Following Moore’s Law down to 10 or even 7 nm labeled feature size demands US $ hundreds of millions of up-front investment, a very large design team and two or more years of development time. These parameters suggest that it only makes sense for very high volume applications to continue on the shrink path to increase SoCs’ functionalities.… Read More


The Mechanical Reliability of IC Packages

The Mechanical Reliability of IC Packages
by Daniel Payne on 01-31-2016 at 12:00 pm

At Intel back in the late 1970’s we were designing DRAM chips and mounting them in ceramic and plastic packages, however there were problems when some of the die would crack inside of the package because of thermal mismatch issues with how the die was attached to the heat spreader inside the package. Back then we really didn’t… Read More


IBM’s OpenPOWER Presence Was Felt Heavily At SuperComputing ’15

IBM’s OpenPOWER Presence Was Felt Heavily At SuperComputing ’15
by Patrick Moorhead on 01-17-2016 at 10:00 pm

IBM is in the process of reinventing themselves as a company, changing how they see themselves, what they do as a company and how they want their partners and customers to view them. This is exemplified best in their mobile alliance with Apple, their Watson cognitive efforts, the sale of their chip fab to GlobalFoundries, the sale… Read More


The Twists and Turns of Xilinx vs Altera!

The Twists and Turns of Xilinx vs Altera!
by Daniel Nenni on 12-08-2015 at 12:00 pm

The battle between Xilinx and Altera continues to be one of the more interesting stories to cover. It really is the semiconductor version of a reality TV show. In the beginning it was two fabless companies partnered with rival foundries going head-to-head controlling a single market that touches a variety of industries.

Then things… Read More