Webinar: Aircraft Interior Lighting Validation

Webinar: Aircraft Interior Lighting Validation
by Admin on 03-07-2023 at 2:39 am

Virtual validation is the process engineers and designers follow using CAE to implement a digital version of a product so its validity can be tested and approved virtually. Digital prototyping reduces development and validation time as well as costs. With Speos this can be achieved by optical simulation of products in multiple… Read More


Webinar: Using Formal Datapath Validation to Verify AI Processor Computations hosted by Synopsys

Webinar: Using Formal Datapath Validation to Verify AI Processor Computations hosted by Synopsys
by Admin on 12-14-2022 at 1:46 pm

Summary

For over a decade, CPU and GPU design companies have been using Synopsys VC Formal Datapath Validation (DPV) app with its HECTOR™ technology to verify their data processing elements because traditional verification methods cannot exhaustively verify the correctness of mathematical computations in these designs.

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Webinar: Formal Validation of a Datapath Pipelined Design with VC Formal

Webinar: Formal Validation of a Datapath Pipelined Design with VC Formal
by Admin on 11-21-2022 at 11:53 am

Synopsys Webinar: Wednesday, November 30, 2022 | 10:00 – 11:00 a.m. Pacific

Finite Impulse Response (FIR) filters are widely used in communication, consumer electronics, and many other digital signal process (DSP) applications. A FIR filter includes a complex pipelined datapath based on arithmetic functions such

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Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges

Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges
by Admin on 06-06-2022 at 12:30 pm

Synopsys Webinar | Thursday, July 14, 2022 | 10:00 – 11:00 a.m. PDT

PCIe, the most popular interconnect in compute, AI and storage systems, is now offering faster data rate, higher performance, lower power and lower latency than the previous generation. Because of these reasons and the addition of PAM-4 signaling, challenges

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Writing C/C++ Models for Efficient Datapath Validation Using VC Formal DPV

Writing C/C++ Models for Efficient Datapath Validation Using VC Formal DPV
by Admin on 05-02-2022 at 1:43 pm

Wednesday, May 18, 2022 | 10:00 – 11:00 a.m. Pacific

AI, Graphics, CPU, and many modern designs have arithmetic intensive blocks that are hard to verify with traditional techniques. Synopsys VC Formal DPV (Datapath Validation) has been the industry’s golden standard to get closure on datapath verification.

In

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Validation and verification of physics-based sensor simulation

Validation and verification of physics-based sensor simulation
by Admin on 12-09-2021 at 2:53 pm

LIVE WEBINAR | 16 DECEMBER 2021 | TWO SESSIONS AVAILABLE

Versatile, reliable, and affordable LiDAR technology supports road safety and comfort

 

High-fidelity sensor simulation is required to develop and test autonomous vehicles thoroughly. Measurement data from physical sensors must be compared against simulated

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Transform recipes into successful products: Speed up your formulation and validation

Transform recipes into successful products: Speed up your formulation and validation
by Admin on 07-29-2021 at 3:56 pm

LIVE WEBINAR | 11 AUGUST 2021 | 2 PM EST

How efficiently can you capitalize on your R&D potential, develop new products with more complexity and bring these products to market faster?

Respond effectively to emerging market trends and maintain a competitive edge through flexible, efficient and comprehensive formulated

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Continuous product validation – automating design validation in automotive

Continuous product validation – automating design validation in automotive
by Admin on 07-03-2021 at 3:58 pm

LIVE WEBINAR | 07 JULY 2021 | TWO SESSIONS AVAILABLE

Consumer demand and government regulations are changing, forcing automakers to shift their focus to greener, smarter, and safer vehicles. And with capable new competitors emerging, delivering on these demands with speed and efficiency is paramount.

Traditional development

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Updated tool cuts through DO-254 V&V chaos

Updated tool cuts through DO-254 V&V chaos
by Don Dingee on 02-03-2016 at 4:00 pm

Audits. The mere mention of the word keeps project managers up at night and sends most designers running. However, in the case of FPGA designs seeking DO-254 compliance, the product doesn’t ship until the audit is complete – there is no avoiding it, or skating around it.… Read More


Maybe not the world, but schedules got eaten

Maybe not the world, but schedules got eaten
by Don Dingee on 01-17-2016 at 4:00 pm

It has been almost five years since Marc Andreessen wrote the words, “Software is eating the world.” The premise of his essay in the Wall Street Journal in 2011 was pretty simple: the technology world has seen its intrinsic value shift from hardware to software. New all-software names have appeared on the list of high flying companies,… Read More