Webinar: Fab.da: Comprehensive AI-Driven Process Analytics for Faster Ramp and Efficient High-Volume Manufacturing

Webinar: Fab.da: Comprehensive AI-Driven Process Analytics for Faster Ramp and Efficient High-Volume Manufacturing
by Admin on 05-30-2024 at 3:20 pm

The challenges before semiconductor fabs are expansive and evolving. As the size of chips shrinks from nanometers to eventually angstroms, the complexity of the manufacturing process increases in response. To combat the complexity and sheer intricacy of semiconductor manufacturing, innovative software solutions are required. 

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Webinar: Maximize Productivity with Deep Insights into PPA Trajectories

Webinar: Maximize Productivity with Deep Insights into PPA Trajectories
by Admin on 05-30-2024 at 3:18 pm

The digital chip design flow carries with it an enormous wealth of untapped information regarding the health and status of your SoC design. The ability to efficiently mine this data provides chip designers with comprehensive visibility and actionable insights to uncover PPA opportunities. This webinar will introduce you to 

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Webinar: Silicon.da: The First Integrated SLM Analytics Solution from Design Through Manufacturing

Webinar: Silicon.da: The First Integrated SLM Analytics Solution from Design Through Manufacturing
by Admin on 05-30-2024 at 3:15 pm

Today’s advanced node chip designs are faced with many new complexities which require more verification, more validation and more analysis. The resulting data from these added steps has also grown exponentially and engineers need a way to efficiently analyze this information. The result is a new paradigm shift which has led

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Webinar: Reimagining Synopsys SLM PVT Monitoring IP for Advanced Node GAA Process

Webinar: Reimagining Synopsys SLM PVT Monitoring IP for Advanced Node GAA Process
by Admin on 05-10-2024 at 2:15 pm

Synopsys’ SLM PVT Monitor (process detector, voltage monitor, temperature sensor) IP can collect voltage, temperature, and process parameters from different blocks within the IC in real time. These data can be analyzed and used to take meaningful action to optimize the performance of the chip at any stage of silicon lifecycle.

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CEO Interview: Dr. Nasib Naser of ORION VLSI Technologies.

CEO Interview: Dr. Nasib Naser of ORION VLSI Technologies.
by Daniel Nenni on 05-10-2024 at 6:00 am

Nasib Naser Picture

Dr. Nasib Naser brings over 35 years of experience in the field. His expertise spans the entire VLSI cycle from conception to chip design, with a strong focus on verification methodologies. For his 17 years at Synopsys, Dr. Naser have held senior management positions, leading North American Verification IP, managing Central … Read More


Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya

Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya
by Daniel Nenni on 05-03-2024 at 10:00 am

Dan is joined by Mayukh Bhattacharya, Engineering, Executive Director, at Synopsys. Mayukh has been with Synopsys since 2003. For the first 14 years, he made many technical contributions to PrimeSim XA. Currently, he leads R&D teams for PrimeSim Design Robustness and PrimeSim Custom Fault products. He was one of the early… Read More


Webinar: Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors

Webinar: Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors
by Admin on 05-01-2024 at 1:03 pm

Thursday, May 30, 2024 | 10:00-11:00 a.m. PDT

Many automotive applications require processing workloads with minimum latency and precise timing budgets.  This is especially true for safety-critical applications like adaptive cruise control and anti-lock braking, where human life may be jeopardized.  These systems require

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