EDA Machine Learning from the Experts!

EDA Machine Learning from the Experts!
by Daniel Nenni on 08-16-2017 at 7:00 am

Traditionally, EDA has been a brute force methodology where we buy more software licenses and more CPUs and keep running endless jobs to keep up with the increasing design and process complexities. SPICE simulation for example; when I meet chip designers (which I do quite frequently) I ask them how many simulations they do for a … Read More


Electrothermal Analysis of an IC for Automotive Use

Electrothermal Analysis of an IC for Automotive Use
by Daniel Payne on 05-16-2017 at 12:00 pm

Automotive ICs have to operate in a very demanding environment in terms of both temperature and voltage ranges, along with the ability to withstand g-forces and be sealed from the elements. Not an easy design challenge. For many consumer ICs we see output drive currents on the IO pins measured in mA, however in automotive if you want… Read More


Webinar on TFT and FPD Design

Webinar on TFT and FPD Design
by Daniel Payne on 05-11-2017 at 12:00 pm

I knew that the acronym for TFT meant Thin Film Transistors, but I hadn’t heard that FPD stands for Flat Panel Detectors. It turns out the FPD are solid-state sensors used in x-ray applications, similar in operation to image sensors for digital photography and video. I’ll be attending and blogging about what I learn… Read More


Analyzing All of those IC Parasitic Extraction Results

Analyzing All of those IC Parasitic Extraction Results
by Daniel Payne on 03-30-2017 at 12:00 pm

Back at DAC in 2011 I first started to hear about this EDA company named edXact that specialized in reducing and analyzing IC parasitic extraction results. So Silvaco acquired edXact and I wanted to get an update on what is new with their EDA tools that help help you to analyze and manage the massive amount of extracted RLC and even K … Read More


SPICE Model Generation using Machine Learning

SPICE Model Generation using Machine Learning
by Daniel Payne on 02-05-2017 at 10:00 pm

AI and machine learning are two popular buzz words in the high-tech daily news, so you should be getting used to hearing about them by now. What I hadn’t realized was that EDA companies are starting to use machine learning techniques, and specifically targeted at the daunting and compute intensive task of creating SPICE models… Read More


CEO Interview: Rene Donkers of Fractal Technologies

CEO Interview: Rene Donkers of Fractal Technologies
by Daniel Nenni on 11-28-2016 at 7:00 am

Fractal is another one of those very successful emerging EDA companies that you don’t read a lot about, except on SemiWiki. Rene Donkers is co-founder and CEO of Fractal Technologies, a company addressing IP quality assurance. This is a niche in the SoC tooling market that deserves some justification. Why not use an IP as-is… Read More


Can one flow bring four domains together?

Can one flow bring four domains together?
by Don Dingee on 10-28-2016 at 4:00 pm

IoT edge device design means four domains – MEMS, analog, digital, and RF – not only work together, but often live on the same die (or substrate in a 2.5D process) and are optimized for power and size. Getting these domains to work together effective calls for an enhanced flow.

Historically, these domains have not played together … Read More


Circuit Simulation Videos Show How To

Circuit Simulation Videos Show How To
by Daniel Payne on 10-13-2016 at 4:00 pm

One of the things that I miss most about attending trade shows like DAC in the old days was that you actually got to see EDA tools being demonstrated live in the exhibit area. You could see what the GUI looked like, how the dialogs worked, and learn what kind of control you could have during analysis. Most of what you see today at DAC in the… Read More


Drift is a Bad Thing for SPICE Circuit Simulators

Drift is a Bad Thing for SPICE Circuit Simulators
by Daniel Payne on 10-07-2016 at 12:00 pm

My first job out of college was with Intel, located in Aloha, Oregon and I did circuit simulations using a proprietary SPICE circuit simulator called ASPEC that was maintained in-house. While doing some circuit simulations one day I noticed that an internal node in one of my circuits was gradually getting higher and higher, even… Read More


TSMC and Solido to Share Experiences with Managing Variation in Webinar

TSMC and Solido to Share Experiences with Managing Variation in Webinar
by Tom Simon on 09-10-2016 at 7:00 am

TSMC knows better than anyone the effect that variation can have at advanced process nodes. Particularly in memory designs and in standard cell designs, variation has become a very critical because of its effects on yield and because of the high-cost of compensating for it. Smaller feature sizes combined with lower voltage thresholds… Read More