For the past few decades, System-on-Chip (SoC) has been the gold standard for optimizing the performance and cost of electronic systems. Pulling together practically all of a smartphone’s digital and analog capabilities into a monolithic chip, the mobile application processor serves as a near-perfect example of an SoC. But… Read More
Tag: soc
Formal Verification of Registers and SoC Assembly in Collaboration with Jasper™ and OneSpin™
Apr 28, 2022 10:00 AM in Pacific Time (US and Canada)
Balancing Test Requirements with SOC Security
Typically, there is an existential rift between the on-chip access requirements for test and the need for security in SoCs. Using traditional deterministic scan techniques has meant opening up full read and write access to the flops in a design through the scan chains. Having this kind of access easily defeats the best designed… Read More
Webinar: Beyond the Basics of IP-based Digital Design Management
According to the ESD Alliance, the single biggest revenue category in our industry is for semiconductor IP, so the concept of IP reuse is firmly established as a way to get complex products to market more quickly and reducing risk. On the flip side, with hundreds or even thousands of IP blocks in a complex SoC, how does a team, division… Read More
D&R IP SoC Silicon Valley 2022
When : April 26th 2022
Where : Computer History Museum
1401 N. Shoreline Blvd
Mountain View, CA 94043, USA
D&R IP-SoC Silicon Valley 2022 Day is the unique worldwide Spring event fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems.
IP-SoC providers, the seed of innovation in Electronic Industry,… Read More
Power Analysis in Advanced SoCs. A Siemens EDA Perspective
The success of modern battery-powered products depends as much on useful operating time between charges as on functionality. FinFET process technologies overtook earlier planar CMOS in part because they significantly reduce leakage power. But they exacerbate dynamic power consumption thanks to increased pin capacitances.… Read More
Early and Accelerated SoC Connectivity Verification using VC Formal Connectivity Checking App
Wednesday, March 9, 2022 | 10-10:45 a.m. PST
Complex bus protocols, increased on-chip functionalities, coupled with limited shared I/O resources, result in complex wiring connections in SoCs with numerous muxing schemes.
Simulation and structural analysis approaches require huge effort and may lead to bug escapes making
Exploring a Software First Approach to Avoid SoC Re-spins
Traditional coverage-based verification methods are no longer sufficient to verify complex SoCs integrating many processor cores and IP subsystems. To conquer the verification challenge of complex SoCs, companies are shifting their development paradigm to a software first approach. By considering the target software
From Now to 2025 – Changes in Store for Hardware-Assisted Verification
Lauro Rizzatti recently interviewed Jean-Marie Brunet, vice president of product management and product engineering in the Scalable Verification Solution division at Siemens EDA, about why hardware-assisted verification is a must have for today’s semiconductor designs. A condensed version of their discussion is below.… Read More
Cliosoft and Microsoft to Collaborate on the RAMP Program
We have all heard of many advanced technological inventions and products from the defense sector that subsequently got commercialized. While most of the Defense Advanced Research Projects Agency (DARPA) projects are classified secrets, many military innovations have had great influence in the commercial sector in the fields… Read More